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PDF MB9AF141NB Data sheet ( Hoja de datos )
| Número de pieza | MB9AF141NB | |
| Descripción | Microcontroller | |
| Fabricantes | Spansion | |
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MB9A140NB Series
32-bit ARM® Cortex®-M3 based Microcontroller
MB9AF141LB/MB/NB, MB9AF142LB/MB/NB,
MB9AF144LB/MB/NB
Data Sheet (Full Production)
Notice to Readers: This document states the current technical specifications regarding the Spansion
product(s) described herein. Spansion Inc. deems the products to have been in sufficient production
volume such that subsequent versions of this document are not expected to change. However,
typographical or specification corrections, or modifications to the valid combinations offered may occur.
Publication Number MB9A140NB_DS706-00040
Revision 4.0
Issue Date June 10, 2015
1 page  
DataSheet
DMA Controller (8 channels)
The DMA Controller has an independent bus from the CPU, so CPU and DMA Controller can process
simultaneously.
8 independently configured and operated channels
Transfer can be started by software or request from the built-in peripherals
Transfer address area: 32-bit (4 Gbytes)
Transfer mode: Block transfer/Burst transfer/Demand transfer
Transfer data type: byte/half-word/word
Transfer block count: 1 to 16
Number of transfers: 1 to 65536
A/D Converter (Max 24 channels)
[12-bit A/D Converter]
Successive Approximation type
Built-in 2 units
Conversion time: 2.0 μs @ 2.7 V to 3.6 V
Priority conversion available (priority at 2 levels)
Scanning conversion mode
Built-in FIFO for conversion data storage (for SCAN conversion: 16 steps, for Priority conversion:
4 steps)
Base Timer (Max 8 channels)
Operation mode is selectable from the followings for each channel.
16-bit PWM timer
16-bit PPG timer
16-/32-bit reload timer
16-/32-bit PWC timer
General-Purpose I/O Port
This series can use its pins as general-purpose I/O ports when they are not used for external bus or
peripherals. Moreover, the port relocate function is built in. It can set which I/O port the peripheral function
can be allocated to.
Capable of pull-up control per pin
Capable of reading pin level directly
Built-in the port relocate function
Up to 83 fast general-purpose I/O Ports@100 pin Package
Some ports are 5V tolerant I/O.
See Pin Description to confirm the corresponding pins.
Dual Timer (32-/16-bit Down Counter)
The Dual Timer consists of two programmable 32-/16-bit down counters.
Operation mode is selectable from the followings for each channel.
Free-running
Periodic (=Reload)
One-shot
June 10, 2015, MB9A140NB_DS706-00040-4v0-E
3
5 Page 
FPT-100P-M36
DataSheet
(TOP VIEW)
P51/INT01_0/SOT3_1/MADATA01_1 81
P52/INT02_0/SCK3_1/MADATA02_1 82
P53/SIN6_0/TIOA1_2/INT07_2/MADATA03_1 83
P54/SOT6_0/TIOB1_2/MADATA04_1 84
P55/SCK6_0/ADTG_1/MADATA05_1 85
P56/INT08_2/MADATA06_1 86
P30/TIOB0_1/INT03_2/MADATA07_1 87
P31/TIOB1_1/SCK6_1/INT04_2/MADATA08_1 88
P32/TIOB2_1/SOT6_1/INT05_2/MADATA09_1 89
P33/INT04_0/TIOB3_1/SIN6_1/ADTG_6/MADATA10_1 90
P34/TIOB4_1/MADATA11_1 91
P35/TIOB5_1/INT08_1/MADATA12_1 92
P36/SIN5_2/INT09_1/MADATA13_1 93
P37/SOT5_2/INT10_1/MADATA14_1 94
P38/SCK5_2/INT11_1/MADATA15_1 95
P39/ADTG_2 96
P3A/TIOA0_1/RTCCO_2/SUBOUT_2 97
P3B/TIOA1_1 98
P3C/TIOA2_1 99
P3D/TIOA3_1 100
QFP - 100
50 P22/AN17/SOT0_0/TIOB7_1
49 P23/AN16/SCK0_0/TIOA7_1
48 P1F/AN15/ADTG_5/MAD23_1
47 P1E/AN14/RTS4_1/MAD22_1
46 P1D/AN13/CTS4_1/MAD21_1
45 P1C/AN12/SCK4_1/MAD20_1
44 P1B/AN11/SOT4_1/MAD19_1
43 P1A/AN10/SIN4_1/INT05_1/MAD18_1
42 P19/AN09/SCK2_2/MAD17_1
41 P18/AN08/SOT2_2/MAD16_1
40 AVSS
39 AVRH
38 AVCC
37 P17/AN07/SIN2_2/INT04_1/MAD15_1
36 P16/AN06/SCK0_1/MAD14_1
35 P15/AN05/SOT0_1/MAD13_1
34 P14/AN04/SIN0_1/INT03_1/MAD12_1
33 P13/AN03/SCK1_1/RTCCO_1/SUBOUT_1/MAD11_1
32 P12/AN02/SOT1_1/MAD10_1
31 P11/AN01/SIN1_1/INT02_1/WKUP1/MAD09_1
<Note>
The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated
port number. For these pins, there are multiple pins that provide the same function for the same channel.
Use the extended port function register (EPFR) to select the pin.
June 10, 2015, MB9A140NB_DS706-00040-4v0-E
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