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IX21844 の電気的特性と機能

IX21844のメーカーはIXYSです、この部品の機能は「High Voltage Half-Bridge Gate Driver」です。


製品の詳細 ( Datasheet PDF )

部品番号 IX21844
部品説明 High Voltage Half-Bridge Gate Driver
メーカ IXYS
ロゴ IXYS ロゴ 




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IX21844 Datasheet, IX21844 PDF,ピン配置, 機能
INTEGRATED CIRCUITS DIVISION
Driver Characteristics
Parameter
Rating
VOFFSET
IO +/- (Source/Sink)
VBIAS
600
1.4 / 1.8
10-20
Units
V
A
V
Features
Floating Channel for Bootstrap Operation to +600V
with an Absolute Maximum Rating of +700V
Programmable Dead-Time
Outputs Can Source 1.4A and Sink 1.8A
Gate Drive Supply Range From 10V to 20V
Tolerant to Negative Voltage Transients:
dV/dt Immune
3.3V and 5V Logic Compatible
Undervoltage Lockout for Both High-side and
Low-Side Outputs
Matched Propagation Delays
Applications
Switch Mode Power Supply
Motor Driver Inverter
DC/DC Converter
Uninterruptible Power Supplies (UPS)
IX21844 Functional Block Diagram
IX21844
High Voltage Half-Bridge
Gate Driver
Description
The IX21844 is a high voltage IC that can drive high
speed MOSFETs and IGBTs that operate up to
+600V. The IX21844 is configured with dependent
high-side and low side referenced output channels
which can source 1.4A and sink 1.8A. The floating
high-side channel can drive an N-channel power
MOSFET or IGBT 600V from the common reference.
Manufactured on IXYS Integrated Circuits Division's
proprietary high-voltage BCDMOS on SOI (silicon on
isolator) process, the IX21844 is extremely robust and
virtually immune to negative transients. The UVLO
circuit prevents the turn-on of the MOSFET or IGBT
until there is sufficient VBS or VCC supply voltage. A
programmable dead-time can be set between 400ns
and 5us to insure that both the high-side and low-side
power MOSFET or IGBT are not enabled at the same
time. Propagation delays are matched for use in high
frequency applications.
The IX21844 is available in 14-pin DIP and 14-pin
SOIC (narrow body) packages. The 14-pin SOIC
(narrow body) package is also available in tape & reel.
Ordering Information
Part Description
IX21844G 14-Pin DIP (25/Tube)
IX21844N 14-Pin SOIC (Narrow Body) (50/Tube)
IX21844NTR 14-Pin SOIC (Narrow Body) (2000/Reel)
IN
DT
+5V
SD
VSS
DS-IX21844-R01
Input
&
Dead-Time
Control Logic
Level
Shift
VSS / COM
Pulse
Generator
High
Voltage
Level
Shift
UVLO
RR
Q
S
Buffer
Level
Shift
VSS / COM
LS Delay
Control
UVLO
Buffer
www.ixysic.com
VB
HO
VS
VCC
LO
COM
1

1 Page





IX21844 pdf, ピン配列
INTEGRATED CIRCUITS DIVISION
1 Specifications
1.1 Package Pinout
IN 1
SD 2
VSS 3
DT 4
COM 5
LO 6
VCC 7
14 N/C
13 VB
12 HO
11 VS
10 N/C
9 N/C
8 N/C
1.2 Pin Description (DIP & SOIC)
Pin# Name
Description
Logic input for both high-side gate
1 IN drive output (HO) and low-side gate
drive output (LO). In phase with HO.
2 SD Shut-down logic input. Active low.
3 VSS Logic ground
4 DT Programmable Dead-Time input
5 COM Low-side return
6 LO Low-side gate drive output
7 VCC Low-side and logic supply
8 N/C No connection
9 N/C No connection
10 N/C No connection
11 VS High-side floating supply return
12 HO High-side gate drive output
13 VB High-side floating supply
14 N/C No connection
R01 www.ixysic.com
IX21844
3


3Pages


IX21844 電子部品, 半導体
INTEGRATED CIRCUITS DIVISION
IX21844
1.7 Test Waveforms
1.7.1 Switching Time Test Circuit
IN
SD
LO
VCC=15V
1
2
3 VSS
4 DT
5 COM
6
CL 7 VCC
10μF 0.1μF
14
13
12
VS 11
10
9
8
10μF 0.1μF
VB=15V
HO
CL
1.7.2 Input/Output Timing Diagram
IN
SD
HO
LO
1.7.3 Shutdown Waveform Definition
SD
50%
tsd
HO 90%
LO
1.7.4 Dead-Time Waveform Definition
50%
IN
50%
90%
HO DTLO-HO 10%
LO 90%
DTHO-LO
10%
MDT= DTLO-HO - DTHO-LO
6
1.7.5 Delay Matching Waveform Definitions
IN(LO)
IN(HO)
50%
50%
LO HO
10%
MT MT
90%
LO HO
1.7.6 Switching Time Waveform Definitions
IN(LO)
IN(HO)
50%
50%
ton tr
toff tf
90% 90%
LO
HO 10%
10%
1.7.7 Truth Table
IN SD HO LO
1 1HL
0 1LH
X0LL
www.ixysic.com
R01

6 Page



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部品番号部品説明メーカ
IX21844

High Voltage Half-Bridge Gate Driver

IXYS
IXYS


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