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PDF PI3PCIE3442 Data sheet ( Hoja de datos )
| Número de pieza | PI3PCIE3442 | |
| Descripción | 3.0 2-Lane Exchange Switch | |
| Fabricantes | Pericom Semiconductor Corporation | |
| Logotipo |  |
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PI3PCIE3442
3.3V PCI Express® 3.0 2-Lane Exchange Switch
Features
ÎÎ8 Differential Channel (2-lane) Exchange
ÎÎPCI Express® 3.0 performance, 8.0 Gbps
ÎÎBi-directional operation
ÎÎLow Bit-to-Bit Skew: 10ps (between ± signals)
ÎÎLow Crosstalk: -29dB @ 2.5GHz (5Gbps)
-20dB @ 4.0GHz (8Gbps)
ÎÎLow Insertion Loss: -1.1dB @ 2.5GHz (5Gbps)
-1.45dB @ 4.0GHz (8Gbps)
ÎÎVDD Operating Range: 3.3V ±10%
ÎÎESD Tolerance: 2kV HBM
ÎÎPackaging (Pb-free & Green):
àà 42-contact, TQFN (ZH42), 3.5x9mm.
àà 40-contact, TQFN (ZL40), 3x6mm.
Description
Pericom semiconductor’s PI3PCIE3442 is a differential exchange
switch featuring pass-through pinout. It supports two full PCI
Express® lanes operating at 8.0Gbps PCIe® 3.0 performance.
With the select control input low, Port A connects to Port B, and
Port C connects to port D for an 8-channel differential pass-
though. When the select control input is high Port A connects
to Port D, and Port B connects to Port C.
Application
Switching 4 lanes of DP1.2 from PC/Notebook/Tablet to Display
monitor
Truth Table
Function
Ax = Bx
Cx = Dx
Ax = Dx
Cx = Bx
Ax, Bx, Cx, Dx = Hi-Z (disconnect)
SEL OE#
00
10
x1
Block Diagram
OE#
SEL
A0+
A0-
C0+
C0-
A1+
A1-
C1+
C1-
A2+
A2-
C2+
C2-
A3+
A3-
C3+
C3-
B0+
B0-
D0+
D0-
B1+
B1-
D1+
D1-
B2+
B2-
D2+
D2-
B3+
B3-
D3+
D3-
All trademarks are property of their respective owners.
14-0088
1
www.pericom.com 06/04/14
1 page  
PI3PCIE3442
3.3V PCI Express® 3.0 2-Lane Exchange Switch
Pin Description (40-TQFN)
Pin #
39
40
3
4
8
9
12
13
36
35
32
31
26
25
22
21
1
2
5
6
10
11
14
16
34
33
30
29
24
23
20
19
38
7
17, 28
15, 18, 27, 37, Center
Pad
Pin Name
A0+
A0–
A1+
A1–
A2+
A2–
A3+
A3–
B0+
B0−
B1+
B1−
B2+
B2−
B3+
B3−
C0+
C0–
C1+
C1–
C2+
C2–
C3+
C3−
D0+
D0−
D1+
D1−
D2+
D2−
D3+
D3−
OE#
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
SEL
VDD
GND
I
Pwr
Pwr
Description
Signal I/O, Channel 0, Port A
Signal I/O, Channel 1, Port A
Signal I/O, Channel 2, Port A
Signal I/O, Channel 3, Port A
Signal I/O, Channel 0, Port B
Signal I/O, Channel 1, Port B
Signal I/O, Channel 2, Port B
Signal I/O, Channel 3, Port B
Signal I/O, Channel 0, Port C
Signal I/O, Channel 1, Port C
Signal I/O, Channel 2, Port C
Signal I/O, Channel 3, Port C
Signal I/O, Channel 0, Port D
Signal I/O, Channel 1, Port D
Signal I/O, Channel 2, Port D
Signal I/O, Channel 3, Port D
Output Enable, active low. When OE# = 0 the device I/O is enabled. When OE#=1,
all I/O are high impedance
Operation mode Select (when SEL=0: A→B, C→D, when SEL=1: A→D, C→B)
3.3V ±10% Positive Supply Voltage
Power ground
All trademarks are property of their respective owners.
14-0088
5
www.pericom.com 06/04/14
5 Page 
PI3PCIE3442
3.3V PCI Express® 3.0 2-Lane Exchange Switch
Test Circuit for Electrical Characteristics(1-5)
VDD
Pulse
Generator
VIN
RT
D.U.T
VOUT
3.0V
200-ohm
4pF
CL
200-ohm
Notes:
1. CL = Load capacitance: includes jig and probe capacitance.
2. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator
3. Output 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
output 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
4. All input impulses are supplied by generators having the following characteristics: PRR ≤ MHz, ZO = 50Ω, tR ≤ 2.5ns, tF ≤ 2.5ns.
5. The outputs are measured one at a time with one transition per measurement.
Switch Positions
Test
tPLZ, tPZL
tPHZ, tPZH
Prop Delay
Switch
3.0V
GND
Open
Switching Waveforms
SEL
tPZL
Output 1
tPZH
Output 2
VDD/2
tPLZ
0.75V
tPHZ
0.75V
VDD/2
VOL + 0.15V
VOL - 0.15V
VDD
0V
VOH
VOL
VOH
VOL
Voltage Waveforms Enable and Disable Times
All trademarks are property of their respective owners.
14-0088
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www.pericom.com 06/04/14
11 Page | ||
| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet PI3PCIE3442.PDF ] | |
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