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PDF RT8175A Data sheet ( Hoja de datos )

Número de pieza RT8175A
Descripción Single-Phase Controller
Fabricantes Richtek 
Logotipo Richtek Logotipo



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®
RT8175A
Single-Phase Controller with Integrated Driver for VR12.1
Mobile CPU Core Power Supply
General Description
The RT8175A is a VR12.1 compliant CPU power controller
which includes one voltage rails : a 1 phase synchronous
buck controller, the CORE VR. The RT8175A has zero
load-line function to support zero load-line application. The
RT8175A adopts G-NAVPTM (Green Native AVP), which is
Richtek's proprietary topology derived from finite DC gain
compensator with current mode control, making it an easy
to set the PWM controller, meeting all Intel CPU
requirements of AVP (Active Voltage Positioning). Based
on the G-NAVPTM topology, the RT8175A also features a
quick response mechanism for optimized AVP performance
during load transient. The RT8175A supports mode
transition function with various operating states. A Serial
VID (SVID) interface is built in the RT8175A to
communicate with Intel VR12.1 compliant CPU. The
RT8175A supports VID on-the-fly function with three
different slew rates : Fast, Slow and Decay. By utilizing
the G-NAVPTM topology, the operating frequency of the
RT8175A varies with VID, load and input voltage to further
enhance the efficiency even in CCM. The built-in high
accuracy DAC converts the SVID code ranging from 0.25V
to 1.52V with 5mV per step, as shown in Table 1. The
RT8175A integrates a high accuracy ADC for platform
setting functions, such as quick response or over current
level. The RT8175A provides VR ready output signals. It
also features complete fault protection functions including
Over Voltage (OV), Under Voltage (UV), Negative Voltage
(NV), Over Current (OC) and Under Voltage Lockout
(UVLO). The RT8175A is available in a WQFN-32L 4x4
small foot print package.
Features
VR12.1 Compatible Power Management States
Switching Frequency up to 1MHz
Serial VID Interface
Signal Phase PWM Controller
G-NAVPTM Topology
0.5% DAC Accuracy
Differential Remote Voltage Sensing
Built-in ADC for Platform Programming
System Thermal Compensated AVP
Diode Emulation Mode at Light Load Condition
Fast transient Response
VR Ready Indicator
Thermal Throttling
Current Monitor Output
Low Quiescent Power at PS3 and PS4
OVP, UVP, OCP, UVLO, NVP
Address Flip Function
DVID Improvement
Applications
VR12.1 Intel Core Supply
Notebook CPU Core Supply
AVP Step-Down Converter
Marking Information
3P= : Product Code
3P=YM
DNN
YMDNN : Date Code
Simplified Application Circuit
To PCH
To CPU
RT8175A
VR_READY
VR_HOT UGATE
VCLK
VDIO
ALERT
PHASE
LGATE
VIN
VCORE
Copyright ©2015 Richtek Technology Corporation. All rights reserved.
DS8175A-02 September 2015
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
1

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RT8175A pdf
Operation
The RT8175A adopts G-NAVPTM (Green Native AVP) which
is Richtek's proprietary topology derived from finite DC
gain of EA amplifier with current mode control, making it
easy to set the droop to meet all Intel CPU requirements
of AVP (Adaptive Voltage Positioning).
The RT8175A adopts the G-NAVPTM controller, which is
one type of current mode constant on-time control with
DC offset cancellation. The approach can not only improve
DC offset problem for increasing system accuracy but also
has fast transient response. When current feedback signal
reaches COMP signal, the RT8175A generates an on-time
width to achieve PWM modulation.
Besides, RT8175A also can support zero load-line
application.
TON GEN
Generate the PWM signal sequentially according to the
phase control signal from the Loop Control Protection
Logic.
SVID Interface/Configuration Registers/Control
Logic
The interface that receives the SVID signal from CPU and
sends the relative signals to Loop Control Protection Logic
to execute the action by CPU.
The registers save the pin setting data from ADC output.
The Control Logic controls the ADC timing and generates
the digital code of the VID that is relative to VSEN.
RT8175A
Loop Control Protection Logic
It controls the power on sequence and the protection
behavior.
Offset Cancellation
Cancel the current/voltage ripple issue to get the accurate
VSEN.
UVLO
Detect the PVCC and VCC voltage and issue POR signal
as they are high enough.
DAC
Generate an analog signal according to the digital code
generated by Control Logic.
Soft-Start & Slew Rate Control
Control the Dynamic VID slew rate of VSET according to
the SetVID fast or SetVID slow. And the soft-start slew
rate is the slow slew rate.
Copyright ©2015 Richtek Technology Corporation. All rights reserved.
DS8175A-02 September 2015
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
5

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RT8175A arduino
VID7
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
VID6
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
VID5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
VID4
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
VID3
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
Copyright ©2015 Richtek Technology Corporation. All rights reserved.
DS8175A-02 September 2015
RT8175A
VID2
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
VID1
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
VID0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
HEX
CD
CE
CF
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
DA
DB
DC
DD
DE
DF
E0
E1
E2
E3
E4
E5
E6
E7
E8
E9
EA
EB
EC
ED
EE
EF
F0
F1
F2
F3
F4
F5
Voltage (V)
1.270
1.275
1.280
1.285
1.290
1.295
1.300
1.305
1.310
1.315
1.320
1.325
1.330
1.335
1.340
1.345
1.350
1.355
1.360
1.365
1.370
1.375
1.380
1.385
1.390
1.395
1.400
1.405
1.410
1.415
1.420
1.425
1.430
1.435
1.440
1.445
1.450
1.455
1.460
1.465
1.470
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
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