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PDF RT3606BC Data sheet ( Hoja de datos )

Número de pieza RT3606BC
Descripción Dual Channel PWM Controller
Fabricantes RichTek 
Logotipo RichTek Logotipo



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®
RT3606BC
Dual Channel PWM Controller with Integrated Driver for IMVP8
CPU Core Power Supply
General Description
Features
The RT3606BC is an IMVP8 compliant CPU power
controller which includes two voltage rails : a 3/2/1 phase
synchronous Buck controller, the CORE VR and a 2/1
phase synchronous Buck controller, the AXG VR. The
RT3606BC adopts G-NAVPTM (Green Native AVP) which
is Richtek's proprietary topology derived from finite DC
gain of EA amplifier with current mode control, making it
easy to set the droop to meet all Intel CPU requirements
of AVP (Adaptive Voltage Positioning). Based on the G-
NAVPTM topology, the RT3606BC also features a quick
response mechanism for optimized AVP performance
during load transient. The RT3606BC supports mode
transition function with various operating states. A serial
VID (SVID) interface is built in the RT3606BC to
communicate with Intel IMVP8 compliant CPU. The
RT3606BC supports VID on-the-fly function with three
different slew rates : Fast, Slow and Decay. By utilizing
the G-NAVPTM topology, the operating frequency of the
RT3606BC varies with VID, load and input voltage to further
enhance the efficiency even in CCM. Moreover, the G-
NAVPTM with CCRCOT (Constant Current Ripple COT)
technology provides superior output voltage ripple over
the entire input/output range. The built-in high accuracy
DAC converts the SVID code ranging from 0.25V to 1.52V
with 5mV per step. The RT3606BC integrates a high
accuracy ADC for platform setting functions, such as quick
response trigger level or over-current level. Besides, the
setting function also supports this two rails address
exchange. The RT3606BC provides VR ready output
signals. It also features complete fault protection functions
including over-voltage (OV), negative voltage (NV), over-
current (OC) and under-voltage lockout (UVLO). The
RT3606BC is available in the WQFN-60L 7x7 small foot
print package.
Intel IMVP8 Serial VID Interface Compatible Power
Management States
3/2/1 Phase (CORE VR) + 2/1 Phase (AXG VR) PWM
Controller
2 Embedded MOSFET Drivers at the CORE VR, 1
Embedded MOSFET Driver at the AXG VR
G-NAVPTM (Green Native Adaptive Voltage
Positioning) Topology
0.5% DAC Accuracy
Differential Remote Voltage Sensing
Built-in ADC for Platform Programming
Accurate Current Balance
System Thermal Compensated AVP
Diode Emulation Mode at Light Load Condition for
Single Phase Operation
Fast Transient Response
VR Ready Indicator
Thermal Throttling
Current Monitor Output
OVP, OCP, NVP, UVLO
Slew Rate Setting/Address Flip Function
Rail Address Flexibility
DVID Enhancement
Applications
IMVP8 Intel Core Supply
Notebook/ Desktop Computer/ Servers Multi-phase CPU
Core Supply
AVP Step-Down Converter
Simplified Application Circuit
To PCH
To CPU
RT3606BC
PGOOD PHASE1
VR_HOT PHASE2
VCLK
PWM3
VDIO PHASEA1
ALERT PWMA2
Driver
Driver
MOSFET
MOSFET
MOSFET
MOSFET
MOSFET
VCORE
VAXG
Copyright ©2016 Richtek Technology Corporation. All rights reserved.
DS3606BC-04 June 2016
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
1

1 page




RT3606BC pdf
Functional Block Diagram
RT3606BC
IBIAS
RGND
FB
COMP
ISEN1P
ISEN1N
ISEN2P
ISEN2N
ISEN3P
ISEN3N
IMON
RGNDA
FBA
COMPA
ISENA1P
ISENA1N
ISENA2P
ISENA2N
IMONA
MUX
MUX
ADC
ADC
SVID Interface
Configuration Registers
IC1_M
Control Logic
IC2_M
IC3_M
Current Mirror
DAC
IC4_M
2V +
-
IBIASI
VID_M VID_A
DVIDTH_X VR address
DVIDWIDTH_X H/L fSW ramp
QR_X
DVID SR
QRWIDTH_X Disable DVID compensation
IC1_A
IC2_A
IC3_A
OCS_M
OCS_A
OCS_TH_X Decrease GTV/SA ramp (only in 1-phase)
From Control Logic DVID SR
RSET_X
Zero load-line
DVIDTH_M
ICCMAX_X Anti-OVS
DAC
DVIDWIDTH_M
OCP_PER_X Anti-OVS behavior
AI gain
Soft-Start & Slew Rate
Control
ERROR
VSET_M AMP
+
-
PSYS function
Offset
Cancellation
PWM
CMP
+
+-
Current Mirror
+ IC1_M
1/3
-
IB1_M
VREF
+GM
-
Current Mirror
RSET_M
+ IC2_M
- IB2_M
Current Mirror
IMON Filter IMONI_M
+ IC3_M
- IB3_M
+
OCS_TH_M -
OCS_M
From Control Logic
DAC
DVID SR
DVIDTH_A
DVIDWIDTH_A
Soft-Start & Slew Rate
Control
ERROR
VSET_A AMP
+
-
Current Mirror
+ IC1_A
- IB1_A
Current Mirror
+ IC2_A
- IB2_A
VREFI
+
-
Offset
Cancellation
1/3
+GM
-
+
RSET_A
IMON Filter IMONI_A
+
OCS_TH_A -
OCS_A
PWM
CMP
+
-
UVLO
Loop Control Protection
Logic
PS_M PS_A
OV_X/NV_X/
OC_PER_X/OC_SUM_X
PS_M
QRTH_M
QRWIDTH_M
TON
GEN
PWM1
PWM2
Current Balance
Driver
IB1_M IB2_M IB3_M
Anti-OVS
PWMA1
Anti-OVS behavior
PS_A
QRTH_A
QRWIDTH_A
TON
GEN
Current Balance
IB1_A IB2_A
GND
TONSET
PWM3
PVCC
BOOT1
UGATE1
PHASE1
LGATE1
BOOT2
UGATE2
PHASE2
LGATE2
BOOTA1
UGATEA1
PHASEA1
LGATEA1
TONSETA
PWMA2
VREF
Copyright ©2016 Richtek Technology Corporation. All rights reserved.
DS3606BC-04 June 2016
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
5

5 Page





RT3606BC arduino
VID7
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
VID6
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VID5
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
VID4
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
VID3
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
VID2
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
VID1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
RT3606BC
VID0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
HEX
94
95
96
97
98
99
9A
9B
9C
9D
9E
9F
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
AA
AB
AC
AD
AE
AF
B0
B1
B2
B3
B4
B5
B6
B7
B8
Voltage (V)
0.985
0.99
0.995
1
1.005
1.01
1.015
1.02
1.025
1.03
1.035
1.04
1.045
1.05
1.055
1.06
1.065
1.07
1.075
1.08
1.085
1.09
1.095
1.1
1.105
1.11
1.115
1.12
1.125
1.13
1.135
1.14
1.145
1.15
1.155
1.16
1.165
Copyright ©2016 Richtek Technology Corporation. All rights reserved.
DS3606BC-04 June 2016
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
11

11 Page







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