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Datasheet RT3662AC PDF ( 特性, スペック, ピン接続図 )

部品番号 RT3662AC
部品説明 Dual-Output PWM Controller
メーカ RichTek
ロゴ RichTek ロゴ 
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RT3662AC Datasheet, RT3662AC PDF,ピン配置, 機能
RT3662AC
Dual-Output PWM Controller with 3 Integrated Drivers for
AMD SVI2 Mobile CPU Power Supply
General Description
RT3662AC is a dual-output PWM controller with 3
integrated drivers, and it is compliant with AMD SVI2
Voltage Regulator Specification to support both CPU
core (VDD) and Northbridge portion of CPU (VDDNB).
The RT3662AC features CCRCOT (Constant Current
Ripple Constant On-Time) with G-NAVP (Green-Native
AVP), which is Richtek's proprietary topology. G-NAVP
makes it an easy setting controller to meet all AMD AVP
(Adaptive Voltage Positioning) VDD/VDDNB
requirements. The droop is easily programmed by
setting the DC gain of the error amplifier. With proper
compensation, the load transient response can achieve
optimized AVP performance. The controller also uses
the interface to issue VOTF Complete and to send
digitally encoded voltage and current values for the
VDD/VDDNB domains. The RT3662AC can operate in
diode emulation mode to enhance the light load
efficiency. And it provides the current gain adjustment
capability by pin setting. RT3662AC provides power
good indication, thermal indication (VRHOT_L), and it
features complete fault protection functions including
over current, over voltage and under voltage.
Marking Information
RT3662AC
GQW
YMDNN
RT3662ACGQW : Product Number
YMDNN : Date Code
Features
2/1-Phase (VDD) + 1/0-Phase (VDDNB) PWM
Controller
3 Embedded MOSFET Drivers
G-NAVPTM Topology
Support Dynamic Load-Line and Zero Load-Line
Diode Emulation Mode at Light Load Condition
SVI2 Interface to Comply with AMD Power
Management Protocol
Adjustable Current Gain Capability
DVID Enhancement
0.5% DAC Accuracy
Differential Remote Voltage Sensing
Build-in ADC for Pin Setting Programming,
Thermal Indication and VOUT, IOUT Reporting
Fast Transient Response
Power Good Indicator
Thermal Indicator (VRHOT_L)
OVP, UVP and UVLO
Over Current Protection
Applications
AMD SVI2 Mobile CPU
Laptop Computer
Simplified Application Circuit
To CPU
RT3662AC
VRHOT_L
PHASE1
SVC
SVD
PHASE2
SVT
PHASE_NB
MOSFET
MOSFET
MOSFET
VVDD
VVDDNB
Copyright © 2016 Richtek Technology Corporation. All rights reserved.
DS3662AC-01 April 2016
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
1

1 Page



RT3662AC pdf, ピン配列
Pin No.
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
RT3662AC
Pin Name
Pin Function
TSEN
This Pin Provides Two Functions: Platform Setting, Platform can use this pin
to set frequency of VDD and VDDNB Controllers, initial offset and per-phase
OCP threshold of VDD Controller. The other function is thermal sense input
for VRHOT indicator. Connect the NTC network for thermal sensing to this
pin.
SET1
Platform Setting Pin. Platform can use this pin to set the AI gain of VDD and
VDDNB Controllers, VDDNB Voltage Reporting Compensation bit1~bit3 and
VDD Controller QRTH.
IMON
Current Monitor Output for the VDD Controller. This pin outputs a voltage
proportional to the output current.
This Pin Provides Two Functions: The 3.2V power supply for pin setting
function divided resistors. The other function is fixed 0.8V output reference
VREF_PINSET voltage, and the voltage is only used to offset the output voltage of IMON and
IMON_NB pins. Connect a RC circuit from this pin to GND. The
recommended resistor is from 3.9to 10, and the capacitor is 0.47F.
IMON_NB
Current Monitor Output for the VDDNB Controller. This pin outputs a voltage
proportional to the output current.
VCC
Controller Power Supply. Connect this pin to 5V and place a decoupling
capacitor 2.2F at least. The decoupling capacitor is as close controller as
possible.
PWROK
System Power Good Input. If PWROK is low, the SVI interface is disabled
and VR returns to BOOT-VID state with initial load-line slope and initial offset.
If PWROK is high, the SVI interface is running and the DAC decodes the
received serial VID codes to determine the output voltage.
SVC
Serial VID Clock Input.
SVD
Serial VID Data Input. This pin is a serial data line.
SVT Serial VID Telemetry Output from VR. This pin is a push-pull output.
VDDIO
Processor Memory Interface Power Rail and Serves as the Reference for
PWROK, SVD, SVC and SVT. This pin is used by the VR to reference the
SVI pins.
TSEN_NB
This Pin Provides Two Functions: Platform Setting, Platform can use this pin
to set initial offset, BOOT VID, Voltage Reporting Compensation bit0 and per-
phase OCP threshold of VDDNB Controller. The other function is thermal
sense input for VRHOT indicator. Connect the NTC network for thermal
sensing to this pin.
ISENN_NB
Negative Current Sense Input for VDDNB Controller.
ISENP_NB
Positive Current Sense Input for VDDNB Controller.
FB_NB
Output Voltage Feedback Input of VDDNB Controller. This pin is the negative
input of the error amplifier for the VDDNB controller.
COMP_NB
Error Amplifier Output Pin of the VDDNB Controller.
VIN VIN Input Pin. Connect a low pass filter to this pin.
EN Controller Enable Input Pin.
BOOT_NB
Bootstrap Supply of VDDNB Controller for High Side MOSFET. This pin
powers high side MOSFET driver.
UGATE_NB
Upper Gate Driver Output of VDDNB Controller. Connect this pin to the gate
input of high side MOSFET.
Copyright © 2016 Richtek Technology Corporation. All rights reserved.
DS3662AC-01 April 2016
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
3


3Pages


RT3662AC 電子部品, 半導体
RT3662AC
Operation
The RT3662AC adopts G-NAVPTM (Green Native
AVP) which is Richtek's proprietary topology derived
from finite DC gain of EA amplifier with current mode
control, making it easy to set the droop to meet all
AMD CPU requirements of AVP (Adaptive Voltage
Positioning). The G-NAVPTM controller is one type of
current mode constant on-time control with DC offset
cancellation. The approach can not only improve DC
offset problem for increasing system accuracy but also
provide fast transient response. When current
feedback signal reaches COMP signal, it generates an
on-time width to achieve PWM modulation.
MUX and ADC
The MUX supports the inputs from SET1, TSEN,
TSEN_NB, IMONI, IMONI_NB, ISENN_NB and VSEN.
The ADC converts these analog signals to digital
codes for reporting or performance adjustment.
SVI2 Interface/Configuration Registers/Control
Logic
The SVI2 interface uses the SVC, SVD, and SVT pins
to communicate with CPU. The configuration registers
save the digital data from ADC output for reporting or
performance adjustment. The Control Logic controls
the ADC timing and generates the digital code of the
VID for VDD/VDDNB voltage.
Loop Control Protection Logic
Loop control protection logic detects EN and UVLO
signals to initiate the soft-start function, and the
PGOOD and VRHOT_L will be controlled after the
soft-start is finished. When VRHOT indication event
occurs, the VRHOT_L pin voltage will be pulled low.
DAC
The DAC receives VID codes from the SVI2 control
logic to generate an internal reference voltage
(VSET/VSET_NB) for controller.
Soft-Start and Slew-Rate Control
This block controls the slew rate of the internal
reference voltage when output voltage changes.
Error Amplifier
Error amplifier generates COMP/COMP_NB signal by
the difference between VSET/VSET_NB and
FB/FB_NB.
Offset Cancellation
This block cancels the output offset voltage from
voltage ripple and current ripple to achieve accurate
output voltage.
UVLO
Detect the VCC pin voltage for under voltage lockout
protection and power on reset operation.
Current Balance
Each phase current sense signal is sent to the current
balance circuit which adjusts the on-time of each
phase to optimize current sharing.
PWM CMP
The PWM comparator compares COMP signal
(COMP/COMP_NB) and current feedback signal to
generate a signal for TONGEN.
TONGEN
This block generates an on-time pulse which high
interval is based on the on-time setting.
RAMP
The Ramp generator is designed to improve noise
immunity and reduce jitter.
OC/OV/UV
Output voltage and output current are sensed for over
current, over voltage and under voltage protection.
Copyright © 2016 Richtek Technology Corporation. All rights reserved.
www.richtek.com
6
is a registered trademark of Richtek Technology Corporation.
DS3662AC-01 April 2016

6 Page





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