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PDF ISL62771 Data sheet ( Hoja de datos )

Número de pieza ISL62771
Descripción Multiphase PWM Regulator
Fabricantes Intersil 
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No Preview Available ! ISL62771 Hoja de datos, Descripción, Manual

DATASHEET
Multiphase PWM Regulator for AMD Fusion™ Mobile
CPUs Using SVI 2.0
ISL62771
The ISL62771 is fully compliant with AMD Fusion SVI 2.0 and
provides a complete solution for microprocessor and graphics
processor core power. The ISL62771 controller supports two
Voltage Regulators (VRs) with three integrated gate drivers. The
Core VR supports 2-, or 1-phase configurations while the
Northbridge VR supports 1-phase operation. The two VRs share a
serial control bus to communicate with the AMD CPU and achieve
lower cost and smaller board area compared with two-chip
solutions.
The PWM modulator is based on Intersil’s Robust Ripple
Regulator R3™ Technology. Compared to traditional modulators,
the R3 modulator can automatically change switching frequency
for faster transient settling time during load transients and
improved light-load efficiency.
The ISL62771 has several other key features. Both outputs
support DCR current sensing with single NTC thermistor for
DCR temperature compensation or accurate resistor current
sensing. Both outputs utilize remote voltage sense, adjustable
switching frequency, OC protection and power-good.
Applications
• AMD fusion CPU/GPU and APU core power
• Notebook computers
Related Literature
TB497, “Disabling the North Bridge Regulator on the
ISL62771”
Features
• Supports AMD SVI 2.0 serial data bus interface
- Serial VID clock frequency range 100kHz to 25MHz
• Dual output controller with integrated drivers
• Precision voltage regulation
- 0.5% system accuracy over-temperature
- 0.5V to 1.55V in 6.25mV steps
- Enhanced load line accuracy
• Supports multiple current sensing methods
- Lossless inductor DCR current sensing
- Precision resistor current sensing
• Programmable 1- or 2-phase for the core output
• Adaptive body diode conduction time reduction
• Superior noise immunity and transient response
• Output current and voltage telemetry
• Differential remote voltage sensing
• High efficiency across entire load range
• Programmable VID offset and droop on both outputs
• Programmable switching frequency for both outputs
• Excellent dynamic current balance between phases
• Protection: OCP/WOC, OVP, PGOOD and thermal monitor
• Small footprint 40 Ld 5x5 TQFN package
- Pb-free (RoHS compliant)
Core Performance
100
90
80
70
60
50
40
30
20
10
0
0
VIN = 12V
VIN = 19V
VIN = 8V
VOUT CORE = 1.1V
5 10 15 20 25 30 35 40 45 50 55
IOUT (A)
FIGURE 1. EFFICIENCY vs LOAD
1.12
1.10
1.08
1.06
1.04
1.02
VIN = 12V
VIN = 8V
1.00
VIN = 19V
0.98 VOUT CORE = 1.1V
0.96 0 5 10 15 20 25 30 35 40 45 50 55
IOUT (A)
FIGURE 2. VOUT vs LOAD
November 18, 2015
FN8321.4
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2012, 2013, 2015. All Rights Reserved
Intersil (and design) and R3 Technology are trademarks owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.

1 page




ISL62771 pdf
ISL62771
Simplified Application Circuit for Low Power CPUs [1+1 Configuration]
VNB
Ri
Cn NTC
NB_PH
ISUMN_NB
ISUMP_NB
BOOT_NB
UGATE_NB
PHASE_NB
LGATE_NB
VIN
NB_PH
VNB
VNB
VNB_SENSE
µP
*RESISTOR REQUIRED OR ISEN1
WILL PULL HIGH IF LEFT OPEN AND 10k*
DISABLE CHANNEL 1.
+5V
VCORE_SENSE
Ri
VO
Cn NTC
PH
COMP_NB
FB_NB
VSEN_NB
IMON_NB
NTC_NB
VR_HOT
THERMAL INDICATOR
PWROK
SVT
SVD
SVC
VDDIO
ISEN1
ISEN2
COMP
FB
VSEN
RTN
ISUMN
NTC
IMON
ISL62771
BOOT2 OPEN
UGATE2
PHASE2
OPEN
OPEN
LGATE2 OPEN
BOOT1
UGATE1
PHASE1
LGATE1
VIN
PH
ISUMP
VCORE
VO
FIGURE 5. TYPICAL APPLICATION CIRCUIT USING INDUCTOR DCR SENSING
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ISL62771 arduino
ISL62771
Electrical Specifications Operating Conditions: VDD = 5V, TA = -40°C to +100°C, fSW = 300kHz, unless otherwise noted. Boldface
limits apply across the operating temperature range, -40°C to +100°C. (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN MAX
(Note 6) TYP (Note 6) UNIT
POWER-GOOD (PGOOD, PGOOD_NB) AND PROTECTION MONITORS
PGOOD Low Voltage
PGOOD Leakage Current
PWROK High Threshold
VOL IPGOOD = 4mA
IOH PGOOD = 3.3V
0.4 V
-1 1 µA
750 mV
VR_HOT_L Pull-Down
11 Ω
PWROK Leakage Current
1 µA
VR_HOT_L Leakage Current
1 µA
GATE DRIVER
UGATE Pull-Up Resistance
UGATE Source Current
UGATE Sink Resistance
UGATE Sink Current
LGATE Pull-Up Resistance
LGATE Source Current
LGATE Sink Resistance
LGATE Sink Current
UGATE to LGATE Dead Time
LGATE to UGATE Dead Time
PROTECTION
RUGPU
IUGSRC
RUGPD
IUGSNK
RLGPU
ILGSRC
RLGPD
ILGSNK
tUGFLGR
tLGFUGR
200mA source current
UGATE - PHASE = 2.5V
250mA sink current
UGATE - PHASE = 2.5V
250mA source current
LGATE - VSSP = 2.5V
250mA sink current
LGATE - VSSP = 2.5V
UGATE falling to LGATE rising, no load
LGATE falling to UGATE rising, no load
1.0 1.5
2.0
1.0 1.5
2.0
1.0 1.5
2.0
0.5 0.9
4.0
23
28
Ω
A
Ω
A
Ω
A
Ω
A
ns
ns
Overvoltage Threshold
Undervoltage Threshold
Current Imbalance Threshold
OVH VSEN rising above setpoint for >1µs
275 325 375
mV
OVH VSEN falls below setpoint for >1µs
275 325 375
mV
One ISEN above another ISEN for >1.2ms 9 mV
Way Overcurrent Trip Threshold
[IMONx Current Based Detection]
IMONxWOC All states, IDROOP = 60µA, RIMON = 135kΩ
15
µA
Overcurrent Trip Threshold
[IMONx Voltage Based Detection]
LOGIC THRESHOLDS
VIMONx_OCP
All states, IDROOP = 45µA,
IIMONx = 11.25µA, RIMON = 135kΩ
1.485 1.510 1.535
V
ENABLE Input Low
ENABLE Input High
ENABLE Leakage Current
VIL
VIH
VIH
IENABLE
HRTZ
IRTZ
ENABLE = 0V
ENABLE = 1V
1.6
1.65
-1
0
18
1
1
35
V
V
V
µA
µA
SVT Impedance
50 Ω
SVC, SVD Input Low
SVC, SVD Input High
SVC, SVD Leakage
VIL % of VDDIO
VIH % of VDDIO
ENABLE = 0V, SVC, SVD = 0V and 1V
70
-1
30 %
%
1 µA
ENABLE = 1V, SVC, SVD = 1V
-5 1 µA
ENABLE = 1V, SVC, SVD = 0V
-35 -20
-5
µA
THERMAL MONITOR
NTC Source Current
NTC = 0.6V
27 30 33
µA
NTC Thermal Warning Voltage
600 640 680
mV
NTC Thermal Warning Voltage
Hysteresis
20 mV
NTC Thermal Shutdown Voltage
530 580 630
mV
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November 18, 2015

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