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IS62WV12816EALL の電気的特性と機能

IS62WV12816EALLのメーカーはISSIです、この部品の機能は「ULTRA LOW POWER CMOS STATIC RAM」です。


製品の詳細 ( Datasheet PDF )

部品番号 IS62WV12816EALL
部品説明 ULTRA LOW POWER CMOS STATIC RAM
メーカ ISSI
ロゴ ISSI ロゴ 




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IS62WV12816EALL Datasheet, IS62WV12816EALL PDF,ピン配置, 機能
IS62/65WV12816EALL
IS62/65WV12816EBLL
128Kx16 LOW VOLTAGE,
ULTRA LOW POWER CMOS STATIC RAM
PRELIMINARY INFORMATION
DECEMBER 2014
KEY FEATURES
High-speed access time: 45ns, 55ns
CMOS low power operation
36 mW (typical) operating
9 µW (typical) CMOS standby
TTL compatible interface levels
Single power supply
1.65V-2.2V VDD (IS62/65WV12816EALL)
2.2V-3.6V VDD (IS62/65WV12816EBLL)
Three state outputs
Industrial and Automotive temperature support
2CS Option Available
Lead-free available
BLOCK DIAGRAM
DESCRIPTION
The ISSI IS62/65WV12816EALL/EBLL are high-speed,
2M bit static RAMs organized as 128K words by 16 bits.
It is fabricated using ISSI's high-performance CMOS
technology. This highly reliable process coupled with
innovative circuit design techniques, yields high-
performance and low power consumption devices.
When
is HIGH (deselected) or when CS2 is
LOW (deselected) or when
is LOW, CS2 is
HIGH and both and
are HIGH, the device
assumes a standby mode at which the power
dissipation can be reduced down with CMOS input
levels.
Easy memory expansion is provided by using Chip
Enable and Output Enable inputs. The active LOW
Write Enable
controls both writing and reading
of the memory. A data byte allows Upper Byte
and Lower Byte ( access.
The IS62/65WV12816EALL/EBLL are packaged in the
JEDEC standard 48-pin mini BGA (6mm x 8mm) and
44-Pin TSOP (TYPE II).
A0 A16
DECODER
128K x 16
MEMORY
ARRAY
VDD
GND
I/O0 I/O7
Lower Byte
I/O8 I/O15
Upper Byte
I/O
DATA
CIRCUIT
COLUMN I/O
CS2
CS1#
OE#
WE#
UB#
LB#
CONTROL
CIRCUIT
Copyright © 2014 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can
reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such
applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances
Integrated Silicon Solution, Inc.- www.issi.com
Rev. 0B
12/9/2014
1

1 Page





IS62WV12816EALL pdf, ピン配列
IS62/65WV12816EALL
IS62/65WV12816EBLL
FUNCTION DESCRIPTION
SRAM is one of random access memories. Each byte or word has an address and can be accessed randomly. SRAM
has three different modes supported. Each function is described below with Truth Table.
STANDBY MODE
Device enters standby mode when deselected (
HIGH or CS2 LOW or both and are HIGH). The input
and output pins (I/O0-15) are placed in a high impedance state. The current consumption in this mode will be ISB1 or
ISB2. CMOS input in this mode will maximize saving power.
WRITE MODE
Write operation issues with Chip selected (
LOW and CS2 HIGH) and Write Enable ( ) input LOW. The input
and output pins(I/O0-15) are in data input mode. Output buffers are closed during this time even if is LOW.
and enables a byte write feature. By enabling LOW, data from I/O pins (I/O0 through I/O7) are written into the
location specified on the address pins. And with being LOW, data from I/O pins (I/O8 through I/O15) are written
into the location.
READ MODE
Read operation issues with Chip selected (
LOW and CS2 HIGH) and Write Enable ( ) input HIGH. When
is LOW, output buffer turns on to make data output. Any input to I/O pins during READ mode is not permitted.
and enables a byte read feature. By enabling LOW, data from memory appears on I/O0-7. And with
being LOW, data from memory appears on I/O8-15.
In the READ mode, output buffers can be turned off by pulling HIGH. In this mode, internal device operates as
READ but I/Os are in a high impedance state. Since device is in READ mode, active current is used.
TRUTH TABLE
Mode
CS2
I/O0-I/O7 I/O8-I/O15 VDD Current
H X X X X X High-Z High-Z
Not Selected
X
L
X
X
X
X
High-Z
High-Z
ISB1,ISB2
X X X X H H High-Z High-Z
Output Disabled
L
L
H
H
H
H
H
H
L
X
X
L
High-Z
High-Z
High-Z
High-Z
ICC
L H H L L H DOUT High-Z
Read
L H H L H L High-Z DOUT
ICC
L H H L L L DOUT DOUT
L H L X L H DIN High-Z
Write
L H L X H L High-Z
DIN
ICC
LHLXL L
DIN
DIN
Integrated Silicon Solution, Inc.- www.issi.com
Rev. 0B
12/9/2014
3


3Pages


IS62WV12816EALL 電子部品, 半導体
IS62/65WV12816EALL
IS62/65WV12816EBLL
IS62(5)WV12816EALL DC ELECTRICAL CHARACTERISTICS-II FOR POWER
(OVER THE OPERATING RANGE)
Symbol Parameter
Test Conditions
Grade
Typ. Max.
ICC VDD Dynamic
Operating
VDD=VDD(max), IOUT=0mA, f=fMAX
Com.
Ind.
12 15
- 18
Supply Current
Auto.
- 25
ICC1 VDD Static
Operating
VDD=VDD(max), IOUT = 0mA, f=0Hz
Com.
Ind.
13
-3
Supply Current
Auto.
-4
ISB2
Note:
CMOS Standby
Current (CMOS
Inputs)
VDD=VDD(max),
(1) 0V ≤ CS2 ≤ 0.2V
or
(2) VDD - 0.2V, CS2 ≥ VDD - 0.2V
or
(3) and ≥ VDD- 0.2V
0.2V, CS2 VDD - 0.2V, f= 0Hz
Com.
Ind.
Auto.
25
- 12
- 25
Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VDD = VDD(typ), TA = 25C
Unit
mA
mA
µA
µA
µA
IS62(5)WV12816EBLL DC ELECTRICAL CHARACTERISTICS-II FOR POWER
(OVER THE OPERATING RANGE)
Symbol Parameter
Test Conditions
Grade
Typ. Max.
ICC VDD Dynamic
Operating
VDD=VDD(max), IOUT=0mA, f=fMAX
Com.
Ind.
12 15
- 18
Supply Current
Auto.
- 25
ICC1 VDD Static
Operating
VDD=VDD(max), IOUT = 0mA, f=0Hz
Com.
Ind.
13
-3
Supply Current
Auto.
-4
ISB2
CMOS Standby
Current (CMOS
Inputs)
VDD=VDD(max),
(1) 0V ≤ CS2 ≤ 0.2V
or
Com.
Ind.
25
- 12
(2) VDD - 0.2V, CS2 ≥ VDD - 0.2V
Auto.
- 25
or
(3) and ≥ VDD- 0.2V
0.2V, CS2 VDD - 0.2V, f= 0Hz
Note:
Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VDD = VDD(typ), TA = 25
Unit
mA
mA
µA
µA
µA
Integrated Silicon Solution, Inc.- www.issi.com
Rev. 0B
12/9/2014
6

6 Page



ページ 合計 : 17 ページ
 
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部品番号部品説明メーカ
IS62WV12816EALL

ULTRA LOW POWER CMOS STATIC RAM

ISSI
ISSI


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