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IS65WV10248EALL の電気的特性と機能

IS65WV10248EALLのメーカーはISSIです、この部品の機能は「ULTRA LOW POWER CMOS STATIC RAM」です。


製品の詳細 ( Datasheet PDF )

部品番号 IS65WV10248EALL
部品説明 ULTRA LOW POWER CMOS STATIC RAM
メーカ ISSI
ロゴ ISSI ロゴ 




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IS65WV10248EALL Datasheet, IS65WV10248EALL PDF,ピン配置, 機能
IS62WV10248EALL/BLL
IS65WV10248EALL/BLL
1Mx8 LOW VOLTAGE,
ULTRA LOW POWER CMOS STATIC RAM
NOVEMBER 2014
KEY FEATURES
High-speed access time: 45ns, 55ns
CMOS low power operation
36 mW (typical) operating
12 µW (typical) CMOS standby
TTL compatible interface levels
Single power supply
1.65V-2.2V VDD (62/65WV10248EALL)
2.2V-3.6V VDD (62/65WV10248EBLL)
Data control for upper and lower bytes
Automotive temperature (-40oC to +125oC)
Lead-free available
BLOCK DIAGRAM
DESCRIPTION
The ISSI IS62WV10248EALL/ IS62WV10248EBLL are
high-speed, 8M bit static RAMs organized as 1M words
by 8 bits. It is fabricated using ISSI's high-performance
CMOS technology. This highly reliable process
coupled with innovative circuit design techniques,
yields high-performance and low power consumption
devices.
When is HIGH (deselected) or when CS2 is low
(deselected), the device assumes a standby mode at
which the power dissipation can be reduced down with
CMOS input levels.
Easy memory expansion is provided by using Chip
Enable and Output Enable inputs. The active LOW
Write Enable ( ) controls both writing and reading of
the memory.
The IS62WV10248EALL and IS62WV10248EBLL are
packaged in the JEDEC standard 48-pin mini BGA
(6mm x 8mm) and 44-Pin TSOP (TYPE II).
Copyright © 2014 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can
reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such
applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances
Integrated Silicon Solution, Inc.- www.issi.com
Rev. B
10/21/2014
1

1 Page





IS65WV10248EALL pdf, ピン配列
IS62WV10248EALL/BLL
IS65WV10248EALL/BLL
FUNCTION DESCRIPTION
SRAM is one of random access memories. Each byte has an address and can be accessed randomly. SRAM has three
different modes supported. Each function is described below with Truth Table.
STANDBY MODE
Device enters standby mode when deselected ( HIGH or CS2 LOW). The input and output pins (I/O0-7) are placed
in a high impedance state. The current consumption in this mode will be either ISB1 or ISB2 depending on the input
level. CMOS input in this mode will maximize saving power.
WRITE MODE
Write operation issues with Chip selected ( LOW and CS2 HIGH) and Write Enable ( ) input LOW. The input and
output pins(I/O0-7) are in data input mode. Output buffers are closed during this time even if is LOW.
READ MODE
Read operation issues with Chip selected ( LOW and CS2 HIGH) and Write Enable ( ) input HIGH. When
LOW, output buffer turns on to make data output. Any input to I/O pins during READ mode is not permitted.
is
In the READ mode, output buffers can be turned off by pulling HIGH. In this mode, internal device operates as
READ but I/Os are in a high impedance state. Since device is in READ mode, active current is used.
TRUTH TABLE
Mode
CS2
I/O Operation
VDD Current
Not Selected
XH
X
X
High-Z
ISB1, ISB2
(Power-down)
XX
L
X
High-Z
ISB1, ISB2
Output Disabled
HL
H
H
High-Z
Icc
Read
HL
H
L
Dout
Icc
Write
LL
H
X
Din
Icc
Integrated Silicon Solution, Inc.- www.issi.com
Rev. B
10/21/2014
3


3Pages


IS65WV10248EALL 電子部品, 半導体
IS62WV10248EALL/BLL
IS65WV10248EALL/BLL
IS62(5)WV10248EALL DC ELECTRICAL CHARACTERISTICS-II FOR POWER
(OVER THE OPERATING RANGE)
Symbol Parameter
Test Conditions
Grade
Typ. Max.
ICC VDD Dynamic
Operating
VDD=VDD(max), IOUT=0mA, f=fMAX
Com.
Ind.
- 12
- 15
Supply Current
Auto.
- 15
ICC1 VDD Static
Operating
VDD=VDD(max), IOUT = 0mA, f=0Hz
Com.
Ind.
-6
-6
Supply Current
Auto.
-6
ISB1
Note:
CMOS Standby
Current (CMOS
Inputs)
VDD=VDD(max),
(1) 0V ≤ CS2 ≤ 0.2V
or
(2) VDD - 0.2V, CS2 ≥ VDD - 0.2V
Com.
Ind.
Auto.
- 20
- 25
- 50
Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VDD = VDD(typ), TA = 25C
Unit
mA
mA
µA
µA
µA
IS62(5)WV10248EBLL DC ELECTRICAL CHARACTERISTICS-II FOR POWER
(OVER THE OPERATING RANGE)
Symbol Parameter
Test Conditions
Grade
Typ. Max.
ICC VDD Dynamic
Operating
VDD=VDD(max), IOUT=0mA, f=fMAX
Com.
Ind.
- 15
- 15
Supply Current
Auto.
- 15
ICC1 VDD Static
Operating
VDD=VDD(max), IOUT = 0mA, f=0Hz
Com.
Ind.
-6
-6
Supply Current
Auto.
-6
ISB1
CMOS Standby
Current (CMOS
Inputs)
VDD=VDD(max),
(1) 0V ≤ CS2 ≤ 0.2V
or
Com.
Ind.
- 20
- 25
(2) VDD - 0.2V, CS2 ≥ VDD - 0.2V
Auto.
- 50
Note:
Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VDD = VDD(typ), TA = 25
Unit
mA
mA
µA
µA
µA
Integrated Silicon Solution, Inc.- www.issi.com
Rev. B
10/21/2014
6

6 Page



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部品番号部品説明メーカ
IS65WV10248EALL

ULTRA LOW POWER CMOS STATIC RAM

ISSI
ISSI


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