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IS66WV51216EBLL の電気的特性と機能

IS66WV51216EBLLのメーカーはISSIです、この部品の機能は「ULTRA LOW POWER PSEUDO CMOS STATIC RAM」です。


製品の詳細 ( Datasheet PDF )

部品番号 IS66WV51216EBLL
部品説明 ULTRA LOW POWER PSEUDO CMOS STATIC RAM
メーカ ISSI
ロゴ ISSI ロゴ 




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IS66WV51216EBLL Datasheet, IS66WV51216EBLL PDF,ピン配置, 機能
IS66WV51216EALL
IS66/67WV51216EBLL
8Mb LOW VOLTAGE,
ADVANCED INFORMATION
NOVEMBER 2013
ULTRA LOW POWER PSEUDO CMOS STATIC RAM
FEATUR ES
• High-speed access time:
– 70ns (IS66WV51216EALL, IS66/67WV51216EBLL)
– 55ns (IS66/67WV51216EBLL)
• CMOS low power operation
• Single power supply
– Vdd = 1.7V-1.95V (IS66WV51216EALL)
– Vdd = 2.5V-3.6V (IS66/67WV51216EBLL)
• Three state outputs
• Data control for upper and lower bytes
• Industrial temperature available
• Lead-free available
FUNCTIONAL BLOCK DIAGRAM
DESCRIPTION
The ISSI IS66WV51216EALL and IS66/67WV51216EBLL
are high-speed, 8M bit static RAMs organized as 512K
words by 16 bits. It is fabricated using ISSI's high-
performance CMOS technology.This highly reliable process
coupled with innovative circuit design techniques, yields
high-performance and low power consumption devices.
When CS1 is HIGH (deselected) or when CS2 is low
(deselected) the device assumes a standby mode at which
the power dissipation can be reduced down with CMOS
input levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs. The active LOW Write Enable
(WE) controls both writing and reading of the memory. A
data byte allows Upper Byte (UB) and Lower Byte (LB)
access.
The IS66WV51216EALL and IS66/67WV51216EBLL are
packaged in the JEDEC standard 48-ball mini BGA (6mm
x 8mm) and 44-Pin TSOP (TYPE II). The device is aslo
available for die sales.
A0-A18
DECODER
512K x 16
MEMORY ARRAY
VDD
GND
I/O0-I/O7
Lower Byte
I/O8-I/O15
Upper Byte
I/O
DATA
CIRCUIT
COLUMN I/O
CS2
CS1
OE
WE
UB
LB
CONTROL
CIRCUIT
Copyright © 2013 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no
liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on
any published information and before placing orders for products.
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause
failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written
assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances
Integrated Silicon Solution, Inc. — www.issi.com 1
Rev. 00A
11/22/2013

1 Page





IS66WV51216EBLL pdf, ピン配列
IS66WV51216EALL
IS66/67WV51216EBLL
TRUTH TABLE
I/O PIN
Mode
WE CS1 CS2 OE LB UB I/O0-I/O7 I/O8-I/O15 Vdd Current
Not Selected
X H X X X X
X X L X X X
High-Z
High-Z
High-Z
High-Z
Isb1, Isb2
Isb1, Isb2
Output Disabled
H L H H L X
H L H H X L
X L H X H H
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
Icc
Icc
Icc
Read
H L H L L H
Dout
High-Z
H L H L H L
High-Z
Dout
H L H L L L Dout Dout
Icc
Write
L L H X L H
Din High-Z
L L H X H L
High-Z
Din
L L H X L L Din Din
Icc
Note:
CS2 input signal pin is only available for 48-ball mini BGA package parts. CS2 input is internally enabled for 44-pin TSOP-II pack-
age parts.
OPERATING RANGE (Vdd)
Range
Ambient Temperature
Industrial
–40°C to +85°C
Automotive, A1 –40°C to +85°C
Automotive, A2 –40°C to +105°C
IS66WV51216EALL
(70ns)
1.7V - 1.95V
IS66WV51216EBLL
(55ns, 70ns)
2.5V - 3.6V
IS67WV51216EBLL
(55ns, 70ns)
2.5V - 3.6V
2.5V - 3.6V
Power-Up Initialization
IS66WV51216EALL/EBLL and IS67WV51216EBLL include an on-chip voltage sensor used to launch the power-up initialization process.
When VDD reaches a stable level at or above the VDD (min) , the device will require 50μs to complete its self-initialization process.
During the initialization period, CS should remain HIGH. When initialization is complete, the device is ready for normal operation.
VDD (min)
0V
VDD
50us
Device Initialization
Device for Normal Operation
Integrated Silicon Solution, Inc. — www.issi.com 3
Rev. 00A
11/22/2013


3Pages


IS66WV51216EBLL 電子部品, 半導体
IS66WV51216EALL
IS66/67WV51216EBLL
1.7V-1.95V POWER SUPPLY CHARACTERISTICS (Over Operating Range)
Symbol Parameter
Test Conditions
Icc
Vdd Dynamic Operating
Supply Current
Vdd = Max.,
Iout = 0 mA, f = fmax
All Inputs 0.4V
or Vdd – 0.2V
Com.
Ind.
Auto.
Icc1
Operating Supply
Current
Vdd = Max., CS1 = 0.2V Com.
WE = Vdd – 0.2V
Ind.
CS2 = Vdd – 0.2V, f = 1mhz Auto.
Isb1 TTL Standby Current
(TTL Inputs)
Vdd = Max.,
Vin = Vih or Vil
CS1 = Vih , CS2 = Vil,
f = 1 MHz
Com.
Ind.
Auto.
Max.
Unit
70ns
20 mA
25
30
4
4
10
0.6
0.6
1
mA
mA
Isb2 CMOS Standby
Current (CMOS Inputs)
Vdd = Max.,
CS1 Vdd – 0.2V,
CS2 0.2V,
Vin Vdd – 0.2V, or
Vin 0.2V, f = 0
Com.
Ind.
Auto.
100
120
150
µA
Note:.
1. At f = fmax, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
6 Integrated Silicon Solution, Inc. — www.issi.com
Rev. 00A
11/22/2013

6 Page



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部品番号部品説明メーカ
IS66WV51216EBLL

ULTRA LOW POWER PSEUDO CMOS STATIC RAM

ISSI
ISSI


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