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PDF IS65WV5128DALL Data sheet ( Hoja de datos )

Número de pieza IS65WV5128DALL
Descripción ULTRA LOW POWER CMOS STATIC RAM
Fabricantes ISSI 
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IS62WV5128DALL/DBLL, IS65WV5128DALL/DBLL
512K x 8 LOW VOLTAGE,
ULTRA LOW POWER CMOS STATIC RAM F EB R U ARY 2012
FEATURES
• High-speed access time: 35, 45, 55 ns
• CMOS low power operation
36 mW (typical) operating
9 µW (typical) CMOS standby
• TTL compatible interface levels
• Single power supply
1.65V – 2.2V Vdd (IS62WV5128DALL)
2.3V – 3.6V Vdd (IS62WV5128DBLL)
• Fully static operation: no clock or refresh
required
• Three state outputs
• Industrial and Automotive temperature support
• Lead-free available
DESCRIPTION
The ISSI IS62WV5128DALL / IS62WV5128DBLL are
high-speed, 4M bit static RAMs organized as 512K words
by 8 bits. It is fabricated using ISSI's high-performance
CMOS technology. This highly reliable process coupled
with innovative circuit design techniques, yields high-
performance and low power consumption devices.
When CS1 is HIGH (deselected) the device assumes
a standby mode at which the power dissipation can be
reduced down with CMOS input levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs. The active LOW Write Enable
(WE) controls both writing and reading of the memory.
The IS62WV5128DALL and IS62WV5128DBLL are
packaged in the JEDEC standard 32-pin TSOP (TYPE
I), 32-pin sTSOP (TYPE I), 32-pin TSOP (Type II), 32-pin
SOP and 36-pin mini BGA.
FUNCTIONAL BLOCK DIAGRAM
A0-A18
VDD
GND
I/O0-I/O7
DECODER
I/O
DATA
CIRCUIT
512K x 8
MEMORY ARRAY
COLUMN I/O
CS1
OE
WE
CONTROL
CIRCUIT
Copyright © 2012 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without
notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the lat-
est version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reason-
ably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications
unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev.  A
02/09/2012
1

1 page




IS65WV5128DALL pdf
IS62WV5128DALL/DBLL, IS65WV5128DALL/DBLL
AC TEST CONDITIONS
Parameter
Unit
(2.3V-3.6V)
Unit
(3.3V + 5%)
Input Pulse Level
0.4V to Vdd - 0.3V
0.4V to Vdd - 0.3V
Input Rise and Fall Times
1V/ ns
1V/ ns
Input and Output Timing
VDD /2
VDD + 0.05
and Reference Level (VRef) 2
Output Load
See Figures 1 and 2 See Figures 1 and 2
R1 ( )
1005
1213
R2 ( )
820 1378
Vtm (V)
3.0V
3.3V
Unit
(1.65V-2.2V)
0.4V to Vdd - 0.3V
1V/ ns
0.9V
See Figures 1 and 2
13500
10800
1.8V
AC TEST LOADS
VTM
R1
OUTPUT
30 pF
Including
jig and
scope
Figure 1.
R2
VTM
R1
OUTPUT
5 pF
Including
jig and
scope
Figure 2.
R2
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev.  A
02/09/2012
5

5 Page





IS65WV5128DALL arduino
IS62WV5128DALL/DBLL, IS65WV5128DALL/DBLL
WRITE CYCLE NO. 2 (WE Controlled: OE is HIGH During Write Cycle)
ADDRESS
tWC
OE
CS1
tSCS1
tHA
WE
DOUT
DIN
tAW
tPWE
tSA tHZWE
DATA UNDEFINED
HIGH-Z
tLZWE
tSD
tHD
DATA-IN VALID
WRITE CYCLE NO. 3 (WE Controlled: OE is LOW During Write Cycle)
ADDRESS
tWC
OE
CS1
tSCS1
tHA
WE
DOUT
DIN
tAW
tPWE
tSA tHZWE
DATA UNDEFINED
HIGH-Z
tLZWE
tSD tHD
DATA-IN VALID
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev.  A
02/09/2012
11

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