PDF IS65WV10248DBLL Data sheet ( Hoja de datos )

Número de pieza	IS65WV10248DBLL
Descripción	ULTRA LOW POWER CMOS STATIC RAM
Fabricantes	ISSI
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No Preview Available ! IS62WV10248DALL/BLL IS65WV10248DALL/BLL 1M x 8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM MA Y 2009 FEATURES • High-speed access time: 45ns, 55ns • CMOS low power operation – 30 mW (typical) operating – 12 µW (typical) CMOS standby • TTL compatible interface levels • Single power supply – 1.65V--2.2V Vdd (62/65WV10248DALL) – 2.4V--3.6V Vdd (62/65WV10248DBLL) • Fully static operation: no clock or refresh required • Three state outputs • Data control for upper and lower bytes • Automotive temperature (-40oC to +125oC) • Lead-free available DESCRIPTION The ISSI IS62WV10248DALL/ IS62WV10248DBLL are high-speed, 8M bit static RAMs organized as 1M words by 8 bits. It is fabricated using ISSI's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields high- performance and low power consumption devices. When CS1 is HIGH (deselected) or when CS2 is low (deselected), the device assumes a standby mode at which the power dissipation can be reduced down with CMOS input levels. Easy memory expansion is provided by using Chip Enable and Output Enable inputs. The active LOW Write Enable (WE) controls both writing and reading of the memory. The IS62WV10248DALL and IS62WV10248DBLL are packaged in the JEDEC standard 48-pin mini BGA (9mm x 11mm) and 44-Pin TSOP (TYPE II). FUNCTIONAL BLOCK DIAGRAM A0-A19 VDD GND I/O0-I/O7 DECODER I/O DATA CIRCUIT 1M x 8 MEMORY ARRAY COLUMN I/O CS2 CS1 CONTROL OE CIRCUIT WE Copyright © 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. A 05/11/09 1 1 page IS62WV10248DALL/BLL, IS65WV10248DALL/BLL AC TEST CONDITIONS Parameter Input Pulse Level Input Rise and Fall Times Input and Output Timing and Reference Level Output Load 62WV10248DALL (Unit) 0.4V to Vdd-0.2 5 ns Vref See Figures 1 and 2 62WV10248DBLL (Unit) 0.4V to Vdd-0.3V 5ns Vref See Figures 1 and 2 R1(Ω) R2(Ω) Vref Vtm 62W10248DALL (1.65V - 2.2V) 3070 3150 0.9V 1.8V 62WV10248DBLL (2.4V - 3.6V) 1029 1728 1.5V 3.0V AC TEST LOADS VTM R1 OUTPUT 30 pF Including jig and scope Figure 1 R2 VTM R1 OUTPUT 5 pF Including jig and scope Figure 2 R2 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. A 05/11/09 5 5 Page IS62WV10248DALL/BLL, IS65WV10248DALL/BLL WRITE CYCLE NO. 2 (WE Controlled: OE is HIGH During Write Cycle) ADDRESS tWC OE CS1 CS2 WE DOUT DIN tSCS1 tHA tSCS2 tAW tPWE tSA tHZWE DATA UNDEFINED HIGH-Z tLZWE tSD tHD DATA-IN VALID WRITE CYCLE NO. 3 (WE Controlled: OE is LOW During Write Cycle) ADDRESS tWC OE CS1 CS2 WE DOUT DIN tSCS1 tHA tSCS2 tAW tPWE tSA tHZWE DATA UNDEFINED HIGH-Z tLZWE tSD tHD DATA-IN VALID Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. A 05/11/09 11 11 Page

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