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74HCT9046A の電気的特性と機能

74HCT9046AのメーカーはNXP Semiconductorsです、この部品の機能は「PLL」です。


製品の詳細 ( Datasheet PDF )

部品番号 74HCT9046A
部品説明 PLL
メーカ NXP Semiconductors
ロゴ NXP Semiconductors ロゴ 




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74HCT9046A Datasheet, 74HCT9046A PDF,ピン配置, 機能
74HCT9046A
PLL with band gap controlled VCO
Rev. 7 — 29 February 2016
Product data sheet
1. General description
The 74HCT9046A. This device features reduced input threshold levels to allow interfacing
to TTL logic levels. Inputs also include clamp diodes, this enables the use of current
limiting resistors to interface inputs to voltages in excess of VCC.
2. Features and benefits
Operation power supply voltage range from 4.5 V to 5.5 V
Low power consumption
Complies with JEDEC standard no. 7A
Inhibit control for ON/OFF keying and for low standby power consumption
center frequency up to 17 MHz (typical) at VCC = 5.5 V
Choice of two phase comparators:
PC1: EXCLUSIVE-OR
PC2: Edge-triggered JK flip-flop
No dead zone of PC2
Charge pump output on PC2, whose current is set by an external resistor Rbias
center frequency tolerance 10 %
Excellent Voltage Controlled Oscillator (VCO) linearity
Low frequency drift with supply voltage and temperature variations
On-chip band gap reference
Glitch free operation of VCO, even at very low frequencies
Zero voltage offset due to operational amplifier buffering
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V

1 Page





74HCT9046A pdf, ピン配列
NXP Semiconductors
5. Block diagram
74HCT9046A
PLL with band gap controlled VCO
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74HCT9046A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 29 February 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
3 of 44


3Pages


74HCT9046A 電子部品, 半導体
NXP Semiconductors
74HCT9046A
PLL with band gap controlled VCO
8. Functional description
The 74HCT9046A is a phase-locked-loop circuit that comprises a linear VCO and two
different phase comparators (PC1 and PC2) with a common signal input amplifier and a
common comparator input, see Figure 1. The signal input can be directly coupled to large
voltage signals (CMOS level), or indirectly coupled (with a series capacitor) to small
voltage signals. A self-bias input circuit keeps small voltage signals within the linear region
of the input amplifiers. With a passive low-pass filter, the 74HCT9046A forms a
second-order loop PLL.
The principle of this phase-locked-loop is based on the familiar 74HCT4046A. However
extra features are built-in, allowing very high-performance phase-locked-loop
applications. This is done, at the expense of PC3, which is skipped in this 74HCT9046A.
The PC2 is equipped with a current source output stage here. Further a band gap is
applied for all internal references, allowing a small center frequency tolerance. The details
are summed up in Section 8.1. If one is familiar with the 74HCT4046A already, it will do to
read this section only.
8.1 Differences with respect to the familiar 74HCT4046A
A center frequency tolerance of maximum 10 %.
The on board band gap sets the internal references resulting in a minimal frequency
shift at supply voltage variations and temperature variations.
The value of the frequency offset is determined by an internal reference voltage of
2.5 V instead of VCC 0.7 V; In this way the offset frequency will not shift over the
supply voltage range.
A current switch charge pump output on pin PC2_OUT allows a virtually ideal
performance of PC2; The gain of PC2 is independent of the voltage across the
low-pass filter; Further a passive low-pass filter in the loop achieves an active
performance. The influence of the parasitic capacitance of the PC2 output plays no
role here, resulting in a true correspondence of the output correction pulse and the
phase difference even up to phase differences as small as a few nanoseconds.
Because of its linear performance without dead zone, higher impedance values for
the filter, hence lower C-values, can be chosen; correct operation will not be
influenced by parasitic capacitances as in case of the voltage source output using the
74HCT4046A.
No PC3 on pin RB but instead a resistor connected to GND, which sets the
load/unload currents of the charge pump (PC2).
Extra GND pin 1 to allow an excellent FM demodulator performance even at 10 MHz
and higher.
Combined function of pin PC1_OUT/PCP_OUT. If pin RB is connected to VCC (no
bias resistor Rbias) pin PC1_OUT/PCP_OUT has its familiar function viz. output of
PC1. If at pin RB a resistor (Rbias) is connected to GND it is assumed that PC2 has
been chosen as phase comparator. Connection of Rbias is sensed by internal circuitry
and this changes the function of pin PC1_OUT/PCP_OUT into a lock detect output
(PCP_OUT) with the same characteristics as PCP_OUT of pin 1 of the 74HCT4046A.
74HCT9046A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 29 February 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
6 of 44

6 Page



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部品番号部品説明メーカ
74HCT9046A

PLL with bandgap controlled VCO

Philips
Philips
74HCT9046A

PLL

NXP Semiconductors
NXP Semiconductors


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