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MUN5216DW1 の電気的特性と機能

MUN5216DW1のメーカーはON Semiconductorです、この部品の機能は「Dual NPN Bias Resistor Transistors」です。


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部品番号 MUN5216DW1
部品説明 Dual NPN Bias Resistor Transistors
メーカ ON Semiconductor
ロゴ ON Semiconductor ロゴ 




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MUN5216DW1 Datasheet, MUN5216DW1 PDF,ピン配置, 機能
MUN5216DW1,
NSBC143TDXV6
Dual NPN Bias Resistor
Transistors
R1 = 4.7 kW, R2 = 8 kW
NPN Transistors with Monolithic Bias
Resistor Network
This series of digital transistors is designed to replace a single
device and its external resistor bias network. The Bias Resistor
Transistor (BRT) contains a single transistor with a monolithic bias
network consisting of two resistors; a series base resistor and a
baseemitter resistor. The BRT eliminates these individual
components by integrating them into a single device. The use of a BRT
can reduce both system cost and board space.
Features
S and NSV Prefix for Automotive and Other Applications
Requiring Unique Site and Control Change Requirements;
AEC-Q101 Qualified and PPAP Capable
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
These Devices are PbFree, Halogen Free/BFR Free and are RoHS
Compliant
MAXIMUM RATINGS
(TA = 25°C, common for Q1 and Q2, unless otherwise noted)
Rating
Symbol
Max
Unit
CollectorBase Voltage
VCBO
50
Vdc
CollectorEmitter Voltage
VCEO
50
Vdc
Collector Current Continuous
IC 100 mAdc
Input Forward Voltage
VIN(fwd)
30
Vdc
Input Reverse Voltage
VIN(rev)
6
Vdc
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
ORDERING INFORMATION
Device
Package
Shipping
MUN5216DW1T1G,
SMUN5216DW1T1G
SOT363
3,000 / Tape & Reel
NSBC143TDXV6T1G
SOT563
4,000 / Tape & Reel
NSBC143TDXV6T5G
SOT563
8,000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and
tape sizes, please refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
http://onsemi.com
PIN CONNECTIONS
(3) (2) (1)
R1
Q1
R2 R1
(4) (5)
R2
Q2
(6)
MARKING DIAGRAMS
6
7F M G
G
1
SOT363
CASE 419B
7F M G
1G
SOT563
CASE 463A
7F = Specific Device Code
M = Date Code*
G = PbFree Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending
upon manufacturing location.
© Semiconductor Components Industries, LLC, 2012
September, 2012 Rev. 0
1
Publication Order Number:
DTC143TD/D

1 Page





MUN5216DW1 pdf, ピン配列
MUN5216DW1, NSBC143TDXV6
ELECTRICAL CHARACTERISTICS (TA = 25°C, common for Q1 and Q2, unless otherwise noted)
Characteristic
Symbol
Min
OFF CHARACTERISTICS
CollectorBase Cutoff Current
(VCB = 50 V, IE = 0)
ICBO
CollectorEmitter Cutoff Current
(VCE = 50 V, IB = 0)
ICEO
EmitterBase Cutoff Current
(VEB = 6.0 V, IC = 0)
IEBO
CollectorBase Breakdown Voltage
(IC = 10 mA, IE = 0)
V(BR)CBO
50
CollectorEmitter Breakdown Voltage (Note 4)
(IC = 2.0 mA, IB = 0)
V(BR)CEO
50
ON CHARACTERISTICS
DC Current Gain (Note 4)
(IC = 5.0 mA, VCE = 10 V)
hFE
160
CollectorEmitter Saturation Voltage (Note 4)
(IC = 10 mA, IB = 1.0 mA)
VCE(sat)
Input Voltage (off)
(VCE = 5.0 V, IC = 100 mA)
Vi(off)
Input Voltage (on)
(VCE = 0.2 V, IC = 10 mA)
Vi(on)
Output Voltage (on)
(VCC = 5.0 V, VB = 2.5 V, RL = 1.0 kW)
VOL
Output Voltage (off)
(VCC = 5.0 V, VB = 0.25 V, RL = 1.0 kW)
VOH
4.9
Input Resistor
R1 3.3
Resistor Ratio
4. Pulsed Condition: Pulse Width = 300 msec, Duty Cycle 2%.
R1/R2
Typ
350
0.6
0.9
4.7
Max
100
500
1.9
0.25
0.2
6.1
Unit
nAdc
nAdc
mAdc
Vdc
Vdc
Vdc
Vdc
Vdc
Vdc
Vdc
kW
400
350
300
(1) SOT363; 1.0 x 1.0 inch Pad
250 (2) SOT563; Minimum Pad
200
(1) (2)
150
100
50
0
50 25
0 25 50 75 100 125 150
AMBIENT TEMPERATURE (°C)
Figure 1. Derating Curve
http://onsemi.com
3


3Pages


MUN5216DW1 電子部品, 半導体
MUN5216DW1, NSBC143TDXV6
PACKAGE DIMENSIONS
SOT563, 6 LEAD
CASE 463A
ISSUE F
D
X
A
L
654
12 3
E
Y
HE
b 65 PL
e 0.08 (0.003) M X Y
C
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE MATERIAL.
MILLIMETERS
INCHES
DIM MIN NOM MAX MIN NOM MAX
A 0.50 0.55 0.60 0.020 0.021 0.023
b 0.17 0.22 0.27 0.007 0.009 0.011
C 0.08 0.12 0.18 0.003 0.005 0.007
D 1.50 1.60 1.70 0.059 0.062 0.066
E 1.10 1.20 1.30 0.043 0.047 0.051
e 0.5 BSC
0.02 BSC
L 0.10 0.20 0.30 0.004 0.008 0.012
HE 1.50 1.60 1.70 0.059 0.062 0.066
SOLDERING FOOTPRINT*
0.3
0.0118
1.35
0.0531
1.0
0.0394
0.45
0.0177
0.5 0.5
0.0197 0.0197
ǒ ǓSCALE 20:1
mm
inches
*For additional information on our PbFree strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/PatentMarking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for
surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where
personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and
its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly,
any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture
of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 3036752175 or 8003443860 Toll Free USA/Canada
Fax: 3036752176 or 8003443867 Toll Free USA/Canada
N. American Technical Support: 8002829855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81358171050
http://onsemi.com
6
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
DTC143TD/D

6 Page



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共有リンク

Link :


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