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PDF EP9442 Data sheet ( Hoja de datos )
| Número de pieza | EP9442 | |
| Descripción | HDMI 1.4 4-In 2-Out Repeater | |
| Fabricantes | Explore | |
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Data Sheet — EP9442_DS V0.3
HDMI 1.4 4-In 2-Out Repeater with MHL and ARC
EP9442
Data Sheet
V0.3
Original Release Date: Jul. 15, 2011
Revised Date: Jun. 12, 2012
Explore
Explore reserves the right to make changes without further notice to any products herein to improve reliability, function or design.
Explore does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it
convey any license under its patent rights nor the rights of others. Explore products are not designed, intended, or authorized for use as
components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any
other application in which the failure of the Explore product could create a situation where personal injury or death may occur. Should
Buyer purchase or use Explore products for any such unintended or unauthorized application, Buyer shall indemnify and hold Explore
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and
reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or
unauthorized use, even if such claim alleges that Explore was negligent regarding the design or manufacture of the part.
Explore Confidential Proprietary
NON-DISCLOSURE AGREEMENT REQUIRED
1
1 page  
Section 2 Overview
2.1 Chip Block Diagram
Figure 2-1 Chip Block Diagram
MCU_SCL
INTb MCU_SDA
T1_SEL
Registers
and
Control Logic
RX00+/-
RX10+/-
RX20+/-
RXC0+/-
DDC0_SDA
DDC0_SCL
RX01+/-
RX11+/-
RX21+/-
RXC1+/-
DDC1_SDA
DDC1_SCL
RX02+/-
RX12+/-
RX22+/-
RXC2+/-
DDC2_SDA
DDC2_SCL
RX03+/-
RX13+/-
RX23+/-
RXC3+/-
DDC3_SDA
DDC3_SCL
HDMI
MHL
RX
Input
Port 0
HDCP
RX
EDID 0
HDMI
RX
Input
Port 1
HDCP
RX
EDID 1
HDMI
RX
Input
Port 2
HDCP
RX
EDID 2
HDMI
RX
Input
Port 3
HDCP
RX
EDID 3
S_SEL
Primary
P_SEL
T0_SEL
ARC-
ARC+
ARC
RX
Data Sheet — EP9442_DS V0.3
TX01+/-
TX11+/-
TX21+/-
TXC1+/-
TX00+/-
TX10+/-
TX20+/-
TXC0+/-
MCLK
IIS_SCK
IIS_WS
IIS_SD*/DSD*
SPDIF
IIS_SCK_IN
IIS_WS_IN
IIS_SD_IN
REG_VIN
Power
Regulator
REG_VO1
REG_VO2
Explore Confidential Proprietary
NON-DISCLOSURE AGREEMENT REQUIRED
5
5 Page 
2.4 Electrical Characteristics
Absolute Maximum Conditions
Data Sheet — EP9442_DS V0.3
Symbol
Parameter
Min Typ
Vcc33
3.3V Supply Voltage
-0.3
Vcc18
1.8V Supply Voltage
-0.3
VI
Input Voltage
-0.3
VO
Output Voltage
-0.3
TJ Junction Temperature
TSTG Storage Temperature -40
θJA Thermal Resistance (Junction to Ambient)1
32
θJC Thermal Resistance (Junction to Case)1
6
NOTES:
1. Analyzed by FEM (Finite Element Modeling) method with chip mounted on 4-layers PCB.
Max
4.0
2.5
Vcc33 + 0.3
Vcc33 + 0.3
125
125
Units
V
V
V
V
°C
°C
°C/W
°C/W
Normal Operating Conditions
Symbol
Parameter
Min Typ Max Units
Vcc33
3.3V Supply Voltage
3.14 3.3
3.6
V
Vcc18
1.8V Supply Voltage
1.71 1.8 1.98
V
VCCN
Supply Voltage Noise1
-0.3
100 mVp-p
TA Ambient Temperature (with power applied) 0
25 70 °C
DC Digital I/O Specifications (under normal operating conditions unless otherwise specified)
Symbol
VREG_VO1
VREG_VO2
IREG_VO1
IREG_VO2
VIH
VIL
VOH
VOL
Parameter
Output Voltage of REG_VO1
Output Voltage of REG_VO2
Output Current of REG_VO1
Output Current of REG_VO2
High-level Input Voltage
Low-level Input Voltage
High-level Output Voltage
Low-level Output Voltage
Conditions
Loading <= 30mA
Loading <= 20mA
Min
2.6
1.45
Typ
2.0
2.4
Max Units
3.6 V
1.98 V
30 mA
20 mA
V
0.8 V
V
0.4 V
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NON-DISCLOSURE AGREEMENT REQUIRED
11
11 Page | ||
| Páginas | Total 24 Páginas | |
| PDF Descargar | [ Datasheet EP9442.PDF ] | |
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