DataSheet.jp

SKY13550-667LF の電気的特性と機能

SKY13550-667LFのメーカーはSkyworks Solutionsです、この部品の機能は「DP8T Main/Receive Diversity Switch」です。


製品の詳細 ( Datasheet PDF )

部品番号 SKY13550-667LF
部品説明 DP8T Main/Receive Diversity Switch
メーカ Skyworks Solutions
ロゴ Skyworks Solutions ロゴ 




このページの下部にプレビューとSKY13550-667LFダウンロード(pdfファイル)リンクがあります。

Total 16 pages

No Preview Available !

SKY13550-667LF Datasheet, SKY13550-667LF PDF,ピン配置, 機能
DATA SHEET
SKY13550-667LF: 0.4 to 3.8 GHz DP8T (SP4T/SP4T)
Main/Receive Diversity Switch with MIPI RFFE Interface for
Carrier Aggregation
Applications
3G/4G multimode cellular handsets (UMTS and CDMA2000)
Carrier aggregation diversity
Features
Broadband frequency range: 0.4 to 3.8 GHz
Single, positive DC power supply (2.5 to 4.8 V)
Excellent Band 13 2nd harmonic performance
Excellent Band 17 3rd harmonic performance
Integrated, programmable MIPI interface using separate
registers for ANT_A and ANT_B bands
Dual antenna ports can be connected externally to a diplexer
Small QFN (14-pin, 1.6 x 2.0 x 0.55 mm) package
(MSL1, 260 C per JEDEC J-STD-020)
Skyworks GreenTM products are compliant with
all applicable legislation and are halogen-free.
For additional information, refer to Skyworks
Definition of GreenTM, document number
SQ04–0074.
Description
The SKY13550-667LF is a dual single-pole, four-throw (2xSP4T)
Mobile Industry Processor Interface (MIPI) controlled antenna
switch designed specifically for receive diversity in carrier
aggregation applications.
The 2xSP4T switch is optimized for broadband performance.
Using advanced switching technologies, the SKY13550-667LF
maintains low insertion loss and high isolation for all switching
paths. The high linearity performance and low insertion loss
achieved by the SKY13550-667LF makes it an ideal choice for
carrier aggregation applications. The switch also exhibits
excellent second/third order intermodulation distortion
(IMD2/IMD3) performance.
TRXA1
TRXA2
TRXA3
TRXA4
TRXB1
TRXB2
TRXB3
TRXB4
Bias
Logic Block
ANT_A
ANT_B
203284D-001
Figure 1. SKY13550-667LF Block Diagram
Switching is controlled by an integrated MIPI decoder. The two
switches can be configured independently. There are separate
registers for each SP4T. No external DC blocking capacitors are
required on the RF paths as long as no DC voltage is applied to
those paths.
The SKY13550-667LF is manufactured in a compact,
1.6 x 2.0 x 0.55 mm, 14-pin surface-mount Quad Flat No-Lead
(QFN) package.
A functional block diagram is shown in Figure 1. The pin
configuration and package are shown in Figure 2. Signal pin
assignments and functional pin descriptions are provided in
Table 1.
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com
203284E • Skyworks Proprietary and Confidential Information • Products and Product Information are Subject to Change Without Notice • January 20, 2016
1

1 Page





SKY13550-667LF pdf, ピン配列
DATA SHEET • SKY13550-667LF: DP8T RECEIVE MAIN/DIVERSITY SWITCH FOR CARRIER AGGREGATION
Electrical and Mechanical Specifications
The absolute maximum ratings of the SKY13550-667LF are
provided in Table 2. Electrical specifications are provided in
Tables 3 and 4.
IMD2 and IMD3 test conditions for various frequencies are listed
in Tables 5 and 6, respectively.
Figure 3 illustrates the test setup used to measure
intermodulation products. This industry standardized test is used
to simulate the WCDMA linearity of the antenna switch. A +20
dBm Continuous Wave (CW) signal, fFUND, is sequentially applied to
the TRX ports, while a –15 dBm CW blocker signal, fBLK, is applied
to the ANT port.
The resulting third order intermodulation distortion (IMD3), fRX, is
measured over all phases of fFUND. The SKY13550-667LF exhibits
exceptional performance for all RF ports.
Table 7 describes the register content and programming
read/write sequences. Refer to the MIPI Alliance Specification for
RF Front-End Control Interface (RFFE), v1.10 (26 July 2011) for
additional information on MIPI programming sequences and MIPI
bus specifications.
Figure 4 provides the timing diagram for register write
commands. Figure 5 provides the timing diagram for register read
commands.
Register descriptions and programming information is provided in
Table 8. Tables 9 and 10 provide the Register_0 and Register_1
logic, respectively.
Table 2. SKY13550-667LF Absolute Maximum Ratings1
Parameter
Symbol
Minimum
Maximum
Units
Supply voltage
VDD
2.5 5.0
V
Digital control signal
VIO
2V
SCLK port voltage
SCLK VIO V
SDATA port voltage
SDATA
VIO V
LTE input power
PIN +31 dBm
Storage temperature
TSTG
–55 +150
C
Operating temperature
TOP
–30 +90
C
1 Exposure to maximum rating conditions for extended periods may reduce device reliability. There is no damage to device with only one parameter set at the limit and all other parameters set
at or below their nominal value. Exceeding any of the limits listed here may result in permanent damage to the device.
CAUTION: Although this device is designed to be as robust as possible, electrostatic discharge (ESD) can damage this device. This device
must be protected at all times from ESD. Static charges may easily produce potentials of several kilovolts on the human body
or equipment, which can discharge without detection. Industry-standard ESD precautions should be used at all times.
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com
203284E • Skyworks Proprietary and Confidential Information • Products and Product Information are Subject to Change Without Notice • January 20, 2016
3


3Pages


SKY13550-667LF 電子部品, 半導体
DATA SHEET • SKY13550-667LF: DP8T MAIN/RECEIVE DIVERSITY SWITCH FOR CARRIER AGGREGATION
Table 4. SKY13550-667LF DC Electrical Specifications1
(VDD = 2.85 V, VIO = 1.8 V, TOP = +25 C, Characteristic Impedance [ZO] = 50 Ω, Unless Otherwise Noted)
Parameter
Symbol
Test Condition
Min Typical
Supply voltage
VDD
2.50 2.85
Supply current, active mode
IDD
50
Interface supply voltage level
VIO
1.65 1.80
Digital data and clock signals:
High
Low
SDATA, SCLK
0.8 × VIO
0
Interface supply current
IVIO
1 Performance is guaranteed only under the conditions listed in this table.
5
Max
4.8
100
1.95
VIO
0.2 × VIO
50
Units
V
μA
V
V
V
μA
Table 5. IMD2 Test Conditions
Band
Transmit
Frequency
(MHz)
1 1950.0
2 1880.0
4 1732.0
5 836.5
7 2535.0
8 897.0
11/21
1452.0
Transmit Power
(dBm)
+20
Frequency Blocker,
Low
(MHz)
190
80
400
45
120
45
Frequency Blocker,
High
(MHz)
4090
3840
3864
1718
5190
1839
2952
Power Blocker
(dBm)
–15
Receive Frequency
(MHz)
2140.0
1960.0
2132.0
881.5
2655.0
942.0
1500
Table 6. IMD3 Test Conditions
Band
Transmit Frequency
(MHz)
1 1950.0
2 1880.0
4 1732.0
5 836.5
7 2535.0
8 897.0
11/21
1452
Transmit Power
(dBm)
+20
Frequency Blocker
(MHz)
1760.0
1800.0
1332.0
791.5
2415.0
852.0
1404
Power Blocker
(dBm)
–15
Receive Frequency
(MHz)
2140.0
1960.0
2132.0
881.5
2655.0
942.0
1500
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com
6 January 20, 2016 • Skyworks Proprietary and Confidential Information • Products and Product Information are Subject to Change Without Notice • 203284E

6 Page



ページ 合計 : 16 ページ
 
PDF
ダウンロード
[ SKY13550-667LF データシート.PDF ]


データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。


共有リンク

Link :


部品番号部品説明メーカ
SKY13550-667LF

DP8T Main/Receive Diversity Switch

Skyworks Solutions
Skyworks Solutions


www.DataSheet.jp    |   2020   |  メール    |   最新    |   Sitemap