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PDF H01N60 Data sheet ( Hoja de datos )
| Número de pieza | H01N60 | |
| Descripción | N-Channel Power Field Effect Transistor | |
| Fabricantes | HI-SINCERITY | |
| Logotipo |  |
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HI-SINCERITY
MICROELECTRONICS CORP.
H01N60 Series
N-Channel Power Field Effect Transistor
Description
This high voltage MOSFET uses an advanced termination scheme to
provide enhanced voltage-blocking capability without degratding
performance over time. In addition, this advanced MOSFET is designed to
withstand high energy in avalanche and commutation modes. The new
energy efficient design also offers a drain-to-source diode with a fast
recovery time. Designed for high voltage, high speed switching
applications in power supplies, converters and PWM motor controls,
these devices are particularly well suited for bridge circuits where diode
speed and commutating safe operating areas are critical and offer
additional and saafety margin against unexpected voltage transients.
Features
• 1A, 600V, RDS(on)=8Ω@VGS=10V
• Low Gate Charge 15nC(Typ.)
• Low Crss 4pF(Typ.)
• Fast Switching
• Improved dv/dt Capability
Absolute Maximum Ratings
Symbol
Parameter
VDSS
ID
IDM
VGS
EAS
IAR
EAR
dv/dt
Drain-Source Voltage
Drain Current (Continuous TC=25oC)
Drain Current (Continuous TC=100oC)
Drain Current (Pulsed) *1
Gate-Source Voltage
Single Pulse Avalanche Energy
(L=59mH, IAS=1.1A, VDD=50V, RG=25Ω, Starting TJ=25°C)
Avalanche Current *1
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt *2
Total Power Dissipation (TA=25oC)
PD Total Power Dissipation (TC=25oC)
Derate above 25°C
Tj, Tstg
TL
Operating and Storage Temperature Range
Maximum Lead Temperature for Soldering Purposes, 1/8”
from case for 5 seconds
*1: Repetitive Rating : Pulse width limited by maximum junction temperature
*2: ISD≤1.1A, di/dt≤200A/us, VDD≤BVDSS, Starting TJ=25oC
Spec. No. : MOS200502
Issued Date : 2005.03.01
Revised Date : 2006.08.31
Page No. : 1/5
H01N60 Series Pin Assignment
Tab
3
2
1
3-Lead Plastic TO-252
Package Code: J
Pin 1: Gate
Pin 2 & Tab: Drain
Pin 3: Source
Tab 3-Lead Plastic TO-251
Package Code: I
Pin 1: Gate
Pin 2 & Tab: Drain
3
2
1
Pin 3: Source
D
H01N60 Series
Symbol:
G
S
H01N60I / H01N60J
600
1
0.6
4
±30
50
1
2.8
4.5
2.5
28
0.22
-55 to +150
300
Units
V
A
A
A
V
mJ
A
mJ
V/nS
W
W
W/°C
°C
°C
H01N60I, H01N60J
HSMC Product Specification
1 page  
HI-SINCERITY
MICROELECTRONICS CORP.
Soldering Methods for HSMC’s Products
1. Storage environment: Temperature=10oC~35oC Humidity=65%±15%
2. Reflow soldering of surface-mount devices
Figure 1: Temperature profile
TP
TL
Tsmax
Ramp-up
tP
tL
Tsmin
tS
Preheat
Ramp-down
25
t 25oC to Peak
Time
Profile Feature
Average ramp-up rate (TL to TP)
Preheat
- Temperature Min (Tsmin)
- Temperature Max (Tsmax)
- Time (min to max) (ts)
Tsmax to TL
- Ramp-up Rate
Time maintained above:
- Temperature (TL)
- Time (tL)
Peak Temperature (TP)
Time within 5oC of actual Peak
Temperature (tP)
Ramp-down Rate
Time 25oC to Peak Temperature
3. Flow (wave) soldering (solder dipping)
Sn-Pb Eutectic Assembly
<3oC/sec
100oC
150oC
60~120 sec
<3oC/sec
183oC
60~150 sec
240oC +0/-5oC
10~30 sec
<6oC/sec
<6 minutes
Products
Pb devices.
Pb-Free devices.
Peak temperature
245oC ±5oC
260oC ±5oC
H01N60I, H01N60J
Spec. No. : MOS200502
Issued Date : 2005.03.01
Revised Date : 2006.08.31
Page No. : 5/5
Critical Zone
TL to TP
Pb-Free Assembly
<3oC/sec
150oC
200oC
60~180 sec
<3oC/sec
217oC
60~150 sec
260oC +0/-5oC
20~40 sec
<6oC/sec
<8 minutes
Dipping time
10sec ±1sec
10sec ±1sec
HSMC Product Specification
5 Page | ||
| Páginas | Total 5 Páginas | |
| PDF Descargar | [ Datasheet H01N60.PDF ] | |
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