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PDF ADG5419 Data sheet ( Hoja de datos )

Número de pieza ADG5419
Descripción Single SPDT Switch
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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Data Sheet
FEATURES
Latch-up immune under all circumstances
Human body model (HBM) ESD rating: 8 kV
Low on resistance: 13.5 Ω
±9 V to ±22 V dual-supply operation
9 V to 40 V single-supply operation
48 V supply maximum ratings
Fully specified at ±15 V, ±20 V, +12 V, and +36 V
VDD to VSS analog signal range
APPLICATIONS
High voltage signal routing
Automatic test equipment
Analog front-end circuits
Precision data acquisition
Industrial instrumentation
Amplifier gain select
Relay replacement
GENERAL DESCRIPTION
The ADG5419 is a monolithic industrial, complementary metal
oxide semiconductor (CMOS) analog switch containing a latch-
up immune single-pole/double-throw (SPDT) switch.
Each switch conducts equally well in both directions when on,
and each switch has an input signal range that extends to the
power supplies. In the off condition, signal levels up to the
supplies are blocked. The ADG5419 exhibits break-before-make
switching action for use in multiplexer applications.
The ultralow on resistance and on-resistance flatness of these
switches make them ideal solutions for data acquisition and gain
switching applications where low distortion is critical. The
latch-up immune construction and high ESD rating make these
switches more robust in harsh environments.
High Voltage Latch-Up Proof,
Single SPDT Switch
ADG5419
FUNCTIONAL BLOCK DIAGRAMS
ADG5419
SA
D
SB
DECODER
IN EN
SWITCHES SHOWN FOR A LOGIC 0 INPUT.
Figure 1. 8-Lead LFCSP
ADG5419
SA
SB
IN
D
SWITCHES SHOWN FOR A LOGIC 0 INPUT.
Figure 2. 8-Lead MSOP
PRODUCT HIGHLIGHTS
1. Trench isolation guards against latch-up. A dielectric trench
separates the P channel and N channel transistors, thereby
preventing latch-up even under severe overvoltage
conditions.
2. Low RON of 13.5 Ω.
3. Dual-supply operation. For applications where the analog
signal is bipolar, the ADG5419 can be operated from dual
supplies up to ±22 V.
4. Single-supply operation. For applications where the analog
signal is unipolar, the ADG5419 can be operated from a
single-rail power supply up to 40 V.
5. 3 V logic compatible digital inputs: VINH = 2.0 V, VINL = 0.8 V.
6. No VL logic power supply required.
7. Available in 8-lead MSOP and 8-lead, 2 mm × 3 mm
LFCSP packages.
Rev. A
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2013–2015 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com

1 page




ADG5419 pdf
Data Sheet
ADG5419
12 V SINGLE SUPPLY
VDD = 12 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.
Table 3.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance, RON
On-Resistance Match Between Channels,
∆RON
On-Resistance Flatness, RFLAT (ON)
LEAKAGE CURRENTS
Source Off Leakage, IS (Off)
Drain Off Leakage, ID (Off)
Channel On Leakage, ID (On), IS (On)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IINL or IINH
Digital Input Capacitance, CIN
DYNAMIC CHARACTERISTICS1
Transition Time, tTRANSITION
tON (EN)
tOFF (EN)
Break-Before-Make Time Delay, tD
Charge Injection, QINJ
Off Isolation
Channel-to-Channel Crosstalk
Total Harmonic Distortion + Noise
−3 dB Bandwidth
Insertion Loss
CS (Off)
CD (Off)
CD (On), CS (On)
POWER REQUIREMENTS
IDD
VDD
25°C −40°C to +85°C −40°C to +125°C Unit
Test Conditions/Comments
26
30 38
0.1
1 1.5
5.5
6.8 8.3
±0.1
±0.25
±0.1
±0.4
±0.1
±1
±4
±0.4 ±4
0 V to VDD
44
1.6
12.3
±10
±10
±10
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
nA typ
nA max
nA typ
nA max
nA typ
nA max
VS = 0 V to 10 V, IS = −10 mA; see
Figure 27
VDD = 10.8 V, VSS = 0 V
VS = 0 V to 10 V, IS = −10 mA
VS = 0 V to 10 V, IS = −10 mA
VDD = +13.2 V, VSS = 0 V
VS = 1 V to 10 V, VD = 10 V to 1 V;
see Figure 24 and Figure 25
VS = 1V to10 V, VD = 10 V to 1V; see Figure 25
VS = VD = 1 V to 10 V; see Figure 24 and
Figure 26
0.002
6
2.0 V min
0.8 V max
μA typ
VIN = VGND or VDD
±0.1 μA max
pF typ
333
ns typ
RL = 300 Ω, CL = 35 pF
414 508
567
ns max
VS = 8 V; see Figure 32
327
ns typ
RL = 300 Ω, CL = 35 pF
410 526
612
ns max
VS = 8 V; see Figure 33
166
ns typ
RL = 300 Ω, CL = 35 pF
200 528
611
ns max
VS = 8 V; see Figure 33
176
ns typ
RL = 300 Ω, CL = 35 pF
97
ns min
VS = 8 V; see Figure 34
55
pC typ
VS = 6 V, RS = 0 Ω, CL = 1 nF; see
Figure 35
−60
dB typ
RL = 50 Ω, CL = 5 pF, f = 1 MHz; see
Figure 29
−80
dB typ
RL = 50 Ω, CL = 5 pF, f = 1 MHz; see
Figure 28
0.03
% typ
RL = 1 kΩ, 6 V p-p, f = 20 Hz to 20 kHz; see
Figure 30
170
MHz typ
RL = 50 Ω, CL = 5 pF; see Figure 31
−1.7
dB typ
RL = 50 Ω, CL = 5 pF, f = 1 MHz; see
Figure 31
15
pF typ
VS = 6 V, f = 1 MHz
29
pF typ
VS = 0 V, f = 1 MHz
50
pF typ
VS = 6 V, f = 1 MHz
VDD = 13.2 V
40
μA typ
Digital inputs = 0 V or VDD
50 65 μA max
9/40 V min/V max GND = 0 V, VSS = 0 V
1 Guaranteed by design; not subject to production test.
Rev. A | Page 5 of 19

5 Page





ADG5419 arduino
Data Sheet
40
35
30 TA = +125°C
25 TA = +85°C
20 TA = +25°C
15 TA = –40°C
10
5
VVDSSD
=
=
12V
0V
0
0 2 4 6 8 10 12
VS, VD (V)
Figure 11. On Resistance as a Function of VS (VD) for Different Temperatures,
12 V Single Supply
25
VVDSSD
=
=
36V
0V
20
15 TA = +125°C
TA = +85°C
10 TA = +25°C
TA = –40°C
5
0
0 5 10 15 20 25 30 35 40
VS, VD (V)
Figure 12. On Resistance as a Function of VS (VD) for Different Temperatures,
36 V Single Supply
0.6
VVVDSBSDIA=S=
+15V
–15V
= +10V/–10V
0.4
0.2
ID, IS (ON) + +
IS (OFF) + –
ID (OFF) – +
ID, IS (ON) – –
0
–0.2 IS (OFF) – +
ID (OFF) + –
–0.4
0
25 50 75 100 125
TEMPERATURE (°C)
Figure 13. Leakage Currents as a Function of Temperature, ±15 V Dual Supply
ADG5419
0.4
VVVDSBSDIA=S=
+20V
–20V
= +15V/–15V
0.2
0
ID, IS (ON) + +
IS (OFF) + –
ID (OFF) – +
–0.2
ID, IS (ON) – –
IS (OFF) – +
–0.4
ID (OFF) + –
–0.6
0
25 50 75 100
TEMPERATURE (°C)
125
Figure 14. Leakage Currents as a Function of Temperature,
±20 V Dual Supply
0.4
VVVDSBSDIA=S=
12V
0V
= 1V/10V
0.3
0.2
0.1
ID, IS (ON) + +
ID, IS (ON) – –
IS (OFF) + –
0
–0.1
–0.2
0
ID (OFF) – +
IS (OFF) – +
ID (OFF) + –
25 50 75 100 125
TEMPERATURE (°C)
Figure 15. Leakage Currents as a Function of Temperature,
12 V Single Supply
0.4
VVVDSBSDIA=S=
36V
0V
= 1V/30V
0.2
ID, IS (ON) + +
IS (OFF) + –
0
ID (OFF) – +
–0.2
ID, IS (ON) – –
IS (OFF) – +
–0.4
ID (OFF) + –
–0.6
0
25 50 75 100 125
TEMPERATURE (°C)
Figure 16. Leakage Currents as a Function of Temperature,
36 V Single Supply
Rev. A | Page 11 of 19

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