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MX25L12805D の電気的特性と機能
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MX25L12805DのメーカーはMacronix Internationalです、この部品の機能は「128M-BIT [x 1] CMOS SERIAL FLASH」です。 |
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製品の詳細 ( Datasheet PDF )
| 部品番号 MX25L12805D |
| 部品説明 128M-BIT [x 1] CMOS SERIAL FLASH |
| メーカ Macronix International |
ロゴ |
このページの下部にプレビューとMX25L12805Dダウンロード（pdfファイル）リンクがあります。 Total 30 pages |
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MX25L12805D
128M-BIT [x 1] CMOS SERIAL FLASH
FEATURES
GENERAL
• Serial Peripheral Interface compatible -- Mode 0 and Mode 3
• 134,217,728 x 1 bit structure
• 4096 equal sectors with 4K byte each
256 equal sectors with 64K byte each
- Any sector can be erased
• Single Power Supply Operation
- 2.7 to 3.6 volt for read, erase, and program operations
• Latch-up protected to 100mA from -1V to Vcc +1V
• Low Vcc write inhibit is from 1.5V to 2.5V
PERFORMANCE
• High Performance
- Fast access time: 50MHz serial clock (30pF + 1TTL Load)
- Fast program time: 1.4ms/page (typical, 256-byte per page) and 9us/byte (typical)
- Fast erase time: 60ms/sector (4KB per sector), 0.7s/block (64KB per block) and 80s/chip
- Acceleration mode:
- Chip erase time: 50s (typical)
• Low Power Consumption
- Low active read current: 25mA (max.) at 50MHz
- Low active programming current: 20mA (max.)
- Low active erase current: 20mA (max.)
- Low standby current: 20uA (max.)
- Deep power-down mode 20uA (max.)
• Typical 100,000 erase/program cycle
• 10 years data retention
www.DataSheet4U.com
SOFTWARE FEATURES
• Input Data Format
- 1-byte Command code
• Advanced Security Features
- Block lock protection
The BP0-BP3 status bit defines the size of the area to be software protection against program and erase instructions
- Additional 512-bit secured OTP for unique identifier
• Auto Erase and Auto Program Algorithm
- Automatically erases and verifies data at selected sector
- Automatically programs and verifies data at selected page by an internal algorithm that automatically times the
program pulse widths (Any page to be programed should have page in the erased state first)
• Status Register Feature
• Electronic Identification
- JEDEC 1-byte manufacturer ID and 2-byte Device ID
- RES command, 1-byte Device ID
- REMS command, ADD=00H will output the manufacturer's ID first and ADD=01H will output device ID first
P/N: PM1310
REV. 1.1, OCT. 01, 2008
1
1 Page
PIN CONFIGURATIONS
16-PIN SOP (300 mil)
HOLD#
VCC
NC
NC
NC
NC
CS#
SO
1
2
3
4
5
6
7
8
16 SCLK
15 SI
14 NC
13 NC
12 NC
11 NC
10 GND
9 WP#/ACC
MX25L12805D
PIN DESCRIPTION
SYMBOL
CS#
SI
SO
SCLK
HOLD#
WP#/ACC
VCC
GND
NC
DESCRIPTION
Chip Select
Serial Data Input
Serial Data Output
Clock Input
Hold, to pause the serial communication
Write Protection: connect to GND;
11V for program/erase acceleration:
connect to 11V
+ 3.3V Power Supply
Ground
No Internal Connection
www.DataSheet4U.com
P/N: PM1310
REV. 1.1, OCT. 01, 2008
3
3Pages
MX25L12805D
to set customer lock-down bit1 as "1". Please refer to table of "security register definition" for security register bit
definition and table of "512-bit secured OTP definition" for address range definition.
- Note: Once lock-down whatever by factory or customer, it cannot be changed any more. While in 512-bit secured OTP
mode, array access is not allowed.
512-bit Secured OTP Definition
Address range
Size
xxxx00~xxxx0F
128-bit
xxxx10~xxxx3F
384-bit
Standard
Factory Lock
ESN (electrical serial number)
N/A
Customer Lock
Determined by customer
www.DataSheet4U.com
P/N: PM1310
REV. 1.1, OCT. 01, 2008
6
6 Page
合計 : 30 ページ |
| PDF ダウンロード [ MX25L12805D データシート.PDF ] |
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データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。 |
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| 部品番号 | 部品説明 | メーカ |
| MX25L12805D | 128M-BIT [x 1] CMOS SERIAL FLASH | Macronix International |