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FDMC6679AZ の電気的特性と機能
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FDMC6679AZのメーカーはFairchild Semiconductorです、この部品の機能は「N-Channel MOSFET」です。 |
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製品の詳細 ( Datasheet PDF )
| 部品番号 FDMC6679AZ |
| 部品説明 N-Channel MOSFET |
| メーカ Fairchild Semiconductor |
ロゴ |
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FDMC6679AZ
P-Channel PowerTrench® MOSFET
-30 V, -20 A, 10 mΩ
Features
Max rDS(on) = 10 mΩ at VGS = -10 V, ID = -11.5 A
Max rDS(on) = 18 mΩ at VGS = -4.5 V, ID = -8.5 A
HBM ESD protection level of 8 kV typical(note 3)
Extended VGSS range (-25 V) for battery applications
High performance trench technology for extremely low rDS(on)
High power and current handling capability
Termination is Lead-free and RoHS Compliant
July 2009
General Description
The FDMC6679AZ has been designed to minimize losses in
load switch applications. Advancements in both silicon and
package technologies have been combined to offer the lowest
rDS(on) and ESD protection.
Applications
Load Switch in Notebook and Server
Notebook Battery Pack Power Management
Top Bottom
Pin 1
S SG
S
MLP 3.3x3.3
DD
D
D
D5
D6
D7
D8
4G
3S
2S
1S
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
www.DataSheetS4Uym.cbomol
VDS
VGS
ID
PD
TJ, TSTG
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous (Package limited)
-Continuous (Silicon limited)
-Continuous
-Pulsed
TC = 25 °C
TC = 25 °C
TA = 25 °C
Power Dissipation
TC = 25 °C
Power Dissipation
TA = 25 °C
Operating and Storage Junction Temperature Range
Thermal Characteristics
(Note 1a)
(Note 1a)
Ratings
-30
±25
-20
-51
-11.5
-32
41
2.3
-55 to +150
Units
V
V
A
W
°C
RθJC
RθJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
Package Marking and Ordering Information
(Note 1a)
3
53
°C/W
Device Marking
FDMC6679AZ
Device
FDMC6679AZ
Package
MLP 3.3x3.3
Reel Size
13 ’’
Tape Width
12 mm
Quantity
3000 units
©2009 Fairchild Semiconductor Corporation
FDMC6679AZ Rev.D1
1
www.fairchildsemi.com
1 Page
Typical Characteristics TJ = 25 °C unless otherwise noted
32
24
16
8
0
0
VGS = -10 V
VGS = -6 V
VGS = -4.5 V
VGS = -4 V
VGS = -3.5 V
VGS = -3 V
PULSE DURATION = 80 µs
DUTY CYCLE = 0.5% MAX
12
-VDS, DRAIN TO SOURCE VOLTAGE (V)
3
Figure 1. On Region Characteristics
4
VGS = -3 V
PULSE DURATION = 80 µs
DUTY CYCLE = 0.5% MAX
3
VGS = -3.5 V
2
VGS = -4 V
VGS = -4.5 V
1
VGS = -6 V
VGS = -10 V
0 8 16 24 32
-ID, DRAIN CURRENT (A)
Figure 2. Normalized On-Resistance
vs Drain Current and Gate Voltage
1.6
ID = -11.5 A
VGS = -10 V
1.4
1.2
1.0
0.8
0.6
-75 -50 -25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
www.DataSheet4U.coFmigure 3. Normalized On Resistance
vs Junction Temperature
50
ID = -11.5 A
PULSE DURATION = 80 µs
DUTY CYCLE = 0.5% MAX
40
30
20
10
0
2
TJ = 125 oC
TJ = 25 oC
468
-VGS, GATE TO SOURCE VOLTAGE (V)
Figure 4. On-Resistance vs Gate to
Source Voltage
10
32
PULSE DURATION = 80 µs
DUTY CYCLE = 0.5% MAX
24 VDS = -5 V
16
8
0
1
TJ = 25 oC
TJ = 150 oC
TJ = -55 oC
23
-VGS, GATE TO SOURCE VOLTAGE (V)
4
Figure 5. Transfer Characteristics
40
10 VGS = 0 V
1 TJ = 150 oC
0.1
TJ = 25 oC
0.01
TJ = -55 oC
0.001
0.0
0.2 0.4 0.6 0.8 1.0
-VSD, BODY DIODE FORWARD VOLTAGE (V)
1.2
Figure 6. Source to Drain Diode
Forward Voltage vs Source Current
©2009 Fairchild Semiconductor Corporation
FDMC6679AZ Rev.D1
3
www.fairchildsemi.com
3Pages
Dimensional Outline and Pad Layout
0.10 C
2X
3.30
A
B
3.30
PIN#1 QUADRANT
TOP VIEW
0.8 MAX
0.10 C
0.08 C 0.05
0.00
SEATING
PLANE
SIDE VIEW
0.10 C
2X
(0.203)
PIN #1 IDENT
www.DataSheet4U.com
(4X)
0.55
0.45
1.150
R0.150
0.299
2.32
2.22
1
0.785
4
0.350
2.05
1.95
8
0.65
5
1.95
0.40
0.30
(8X)
0.10
0.05
CAB
C
BOTTOM VIEW
A. DOES NOT CONFORM TO JEDEC
REGISTRATION MO-229
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS AND TOLERANCES PER
ASME Y14.5M, 1994
D. DRAWING FILE NAME : MLP08XREVA
E. LAND PATTERN RECOMMENDATION IS
BASED ON FSC DESIGN ONLY
RECOMMENDED LAND PATTERN
©2009 Fairchild Semiconductor Corporation
FDMC6679AZ Rev.D1
6
www.fairchildsemi.com
6 Page
合計 : 7 ページ |
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| 部品番号 | 部品説明 | メーカ |
| FDMC6679AZ | N-Channel MOSFET | Fairchild Semiconductor |