WV3HG2128M64EEU-D6 の電気的特性と機能

WV3HG2128M64EEU-D6のメーカーはWhite Electronic Designsです、この部品の機能は「2GB - 2x128Mx64 DDR2 SDRAM UNBUFFERED」です。

製品の詳細 ( Datasheet PDF )

部品番号
WV3HG2128M64EEU-D6

部品説明
2GB - 2x128Mx64 DDR2 SDRAM UNBUFFERED

メーカ
White Electronic Designs

ロゴ

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WV3HG2128M64EEU-D6 Datasheet, WV3HG2128M64EEU-D6 PDF,ピン配置, 機能

White Electronic Designs WV3HG2128M64EEU-D6

ADVANCED*

2GB – 2x128Mx64 DDR2 SDRAM UNBUFFERED

FEATURES

Unbuffered 240-pin, dual in-line memory module

Fast data transfer rates: PC2-6400*, PC2-5300*,

PC2-4300 and PC2-3200

VCC = VCCQ = 1.8V

VCCSPD = +1.7V to +3.6V

Differential data strobe (DQS, DQS#) option

Four-bit prefetch architecture

DLL to align DQ and DQS transitions with CK

Multiple internal device banks for concurrent

operation

Supports duplicate output strobe (RDQS/RDQS#)

Programmable CAS# latency (CL): 3, 4, 5* and 6*

Adjustable data-output drive strength

On-die termination (ODT)

Serial Presence Detect (SPD) with EEPROM

Auto & self refresh (64ms 8,192 cycle refresh)

Gold edge contacts

Product is lead-free

Dual Rank

www.DRatoaSHhSeect4oUm.copmliant

Package option

• 240 Pin DIMM

• 30.00mm (1.181") TYP

DESCRIPTION

The WV3HG2128M64EEU is a 2x128Mx64 Double Data

Rate DDR2 SDRAM high density module. This memory

module consists of sixteen 128Mx8 bit with 4 banks DDR2

Synchronous DRAMs in FBGA packages, mounted on a

240-pin DIMM FR4 substrate.

* This product is under development, is not qualiﬁed or characterized and is subject to

change or cancellation without notice.

NOTE: Consult factory for availability of:

• Vendor source control options

• Industrial temperature option

• Parity function

Clock Speed

CL-tRCD-tRP

* Consult factory for availability

PC2-6400*

400MHz

6-6-6

OPERATING FREQUENCIES

PC2-5300*

333MHz

5-5-5

PC2-4300

266MHz

4-4-4

PC2-3200

200MHz

3-3-3

August 2006

Rev. 1

1 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

1 Page

White Electronic Designs WV3HG2128M64EEU-D6

ADVANCED

FUNCTIONAL BLOCK DIAGRAM

CS1#

CS0#

DQS0

DQS0#

DM0

DQS1

DQS1#

DM1

DQS2

DQS2#

DM2

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

DQ8

DQ9

DQ10

DQ11

DQ12

DQ13

DQ14

DQ15

DQS3

DQS3#

DM3

DQ16

DQ17

DQ18

DQ19

DQ20

DQ21

DQ22

DQ23

www.DataSheet4U.com

DQ24

DQ25

DQ26

DQ27

DQ28

DQ29

DQ30

DM/

RDQS

I/O 0

I/O 1

I/O 2

I/O 3

I/O 4

I/O 5

I/O 6

I/O 7

DM/

RDQS

I/O 0

I/O 1

I/O 2

I/O 3

I/O 4

I/O 5

I/O 6

I/O 7

DM/

RDQS

I/O 0

I/O 1

I/O 2

I/O 3

I/O 4

I/O 5

I/O 6

I/O 7

DM/

RDQS

I/O 0

I/O 1

I/O 2

I/O 3

I/O 4

I/O 5

I/O 6

I/O 7

CS# DQS DQS#

DM/

RDQS

I/O 0

I/O 1

I/O 2

I/O 3

I/O 4

I/O 5

I/O 6

I/O 7

CS# DQS DQS#

DM/

RDQS

I/O 0

I/O 1

I/O 2

I/O 3

I/O 4

I/O 5

I/O 6

I/O 7

CS# DQS DQS#

DM/

RDQS

I/O 0

I/O 1

I/O 2

I/O 3

I/O 4

I/O 5

I/O 6

I/O 7

CS# DQS DQS#

DM/

RDQS

I/O 0

I/O 1

I/O 2

I/O 3

I/O 4

I/O 5

I/O 6

I/O 7

CS# DQS DQS#

DQS4

DQS4#

DM4

CS# DQS DQS#

DQS5

DQS5#

DM5

DQS6

DQS6#

DM6

CS# DQS DQS#

DQS7

DQS7#

DM7

CS# DQS DQS#

DQ32

DQ33

DQ34

DQ35

DQ36

DQ37

DQ38

DQ39

DM/

RDQS

I/O 0

I/O 1

I/O 2

I/O 3

I/O 4

I/O 5

I/O 6

I/O 7

CS# DQS DQS#

DM/

RDQS

I/O 0

I/O 1

I/O 2

I/O 3

I/O 4

I/O 5

I/O 6

I/O 7

CS# DQS DQS#

DQ40

DQ41

DQ42

DQ43

DQ44

DQ45

DQ46

DQ47

DM/

RDQS

I/O 0

I/O 1

I/O 2

I/O 3

I/O 4

I/O 5

I/O 6

I/O 7

CS# DQS DQS#

DM/

RDQS

I/O 0

I/O 1

I/O 2

I/O 3

I/O 4

I/O 5

I/O 6

I/O 7

CS# DQS DQS#

DQ48

DQ49

DQ50

DQ51

DQ52

DQ53

DQ54

DQ55

DM/

RDQS

I/O 0

I/O 1

I/O 2

I/O 3

I/O 4

I/O 5

I/O 6

I/O 7

CS# DQS DQS#

DM/

RDQS

I/O 0

I/O 1

I/O 2

I/O 3

I/O 4

I/O 5

I/O 6

I/O 7

CS# DQS DQS#

DQ56

DQ57

DQ58

DQ59

DQ60

DQ61

DQ62

DQ63

DM/

RDQS

I/O 0

I/O 1

I/O 2

I/O 3

I/O 4

I/O 5

I/O 6

I/O 7

CS# DQS DQS#

DM/

RDQS

I/O 0

I/O 1

I/O 2

I/O 3

I/O 4

I/O 5

I/O 6

I/O 7

CS# DQS DQS#

VCCSPD

VCC\VCCQ

VREF

VSS

Serical PD

DDR2 SDRAMs

CS0#

CS1#

BA0-BA2

A0-A13

RAS#

CAS#

WE#

CKE0

CKE1

ODT0

ODT1

CS0#: DDR 2 SDRAMs

CS1#: DDR 2 SDRAMs

BA0-BA2: DDR 2 SDRAMs

A0-A13: DDR 2 SDRAMs

RAS#: DDR 2 SDRAMs

CAS#: DDR 2 SDRAMs

WE#: DDR 2 SDRAMs

CKE0: DDR 2 SDRAMs

CKE1: DDR 2 SDRAMs

ODT0: DDR 2 SDRAMs

ODT1: DDR 2 SDRAMs

SCL

Serial PD

A0 A1

SA0 SA1

SA2

*Clock Wiring

Clock

Input

DDR2 SDRAMs

*CK0/CK0#

*CK1/CK1#

*CK2/CK2#

4 DDR2 SDRAMs

6 DDR2 SDRAMs

*Wire per Clock Loading

Table/Wiring Diagrams

Notes:

1. DQ, DM, DQS/DQS# resistors: 5.1 Ohms +/-5%

2. BAx, Ax RAS#, CAS#, WE# resistors: 5.1 Ohms +/- 5%

SDA

August 2006

Rev. 1

3 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

3Pages

White Electronic Designs WV3HG2128M64EEU-D6

ADVANCED

DDR2 ICC SPECIFICATIONS AND CONDITIONS

DDR2 SDRAM components only

Symbol Proposed Conditions

ICC0* Operating one bank active-precharge current;

tCK = tCK(ICC), tRC = tRC(ICC), tRAS = tRASmin(ICC); CKE is HIGH, CS# is HIGH between valid

commands; Address bus inputs are SWITCHING; Data bus inputs are SWITCHING

ICC1* Operating one bank active-read-precharge current;

IOUT = 0mA; BL = 4, CL = CL(ICC), AL = 0; tCK = tCK(ICC), tRC = tRC (ICC), tRAS = tRASmin(ICC), tRCD

= tRCD(ICC); CKE is HIGH, CS# is HIGH between valid commands; Address bus inputs are

SWITCHING; Data pattern is same as ICC4W

ICC2P*

Precharge power-down current;

All banks idle; tCK = tCK(ICC); CKE is LOW; Other control and address bus inputs are STABLE;

Data bus inputs are FLOATING

ICC2Q**

Precharge quiet standby current;

All banks idle; tCK = tCK(ICC); CKE is HIGH, CS# is HIGH; Other control and address bus inputs

are STABLE; Data bus inputs are FLOATING

ICC2N**

Precharge standby current;

All banks idle; tCK = tCK(ICC); CKE is HIGH, CS# is HIGH; Other control and address bus inputs

are SWITCHING; Data bus inputs are SWITCHING

ICC3P**

Active power-down current;

All banks open; tCK = tCK(ICC); CKE is LOW; Other control and

address bus inputs are STABLE; Data bus inputs are FLOATING

Fast PDN Exit MRS(12) = 0

Slow PDN Exit MRS(12) = 1

ICC3N**

Active standby current;

All banks open; tCK = tCK(ICC), tRAS = tRASmax(ICC), tRP = tRP(ICC); CKE is HIGH, CS# is HIGH

between valid commands; Other control and address bus inputs are SWITCHING; Data bus

inputs are SWITCHING

ICC4W* Operating burst write current;

All banks open, Continuous burst writes; BL = 4, CL = CL(ICC), AL = 0; tCK = tCK(ICC), tRAS =

www.DataShteReASt4mUa.xc(oICmC), tRP = tRP(ICC); CKE is HIGH, CS# is HIGH between valid commands; Address bus

inputs are SWITCHING; Data bus inputs are SWITCHING

ICC4R*

Operating burst read current;

All banks open, Continuous burst reads, IOUT = 0mA; BL = 4, CL = CL(ICC), AL = 0; tCK = tCK(ICC),

tRAS = tRASmax(ICC), tRP = tRP(ICC); CKE is HIGH, CS# is HIGH between valid commands; Address

bus inputs are SWITCHING; Data pattern is same as ICC4W

ICC5B**

Burst auto refresh current;

tCK = tCK(ICC); Refresh command at every tRFC(ICC) interval; CKE is HIGH, CS# is HIGH between

valid commands; Other control and address bus inputs are SWITCHING; Data bus inputs are

SWITCHING

ICC6** Self refresh current;

CK and CK\ at 0V; CKE 0.2V; Other control and address bus

inputs are FLOATING; Data bus inputs are FLOATING

Normal

ICC7* Operating bank interleave read current;

All bank interleaving reads, IOUT = 0mA; BL = 4, CL = CL(ICC), AL = tRCD(ICC)-1*tCK(ICC); tCK =

tCK(ICC), tRC = tRC(ICC), tRRD = tRRD(ICC), tRCD = 1*tCK(ICC); CKE is HIGH, CS# is HIGH between

valid commands; Address bus inputs are STABLE during DESELECTs; Data bus inputs are

SWITCHING.

806

TBD

Note: ICC speciﬁcation is based on SAMSUNG components. Other DRAM Manufacturers speciﬁcation may be different.

*: Value calculated as one module rank in this operating condition, and all other module ranks in ICC2P (CKE LOW) mode.

**: Value calculated reﬂects all module ranks in this operating condition.

665

816

896

192

640

720

480

192

800

1,336

3,520

160

2,496

553 403 Units

776 736 mA

856 816 mA

192 192 mA

560 560 mA

640 640 mA

400 400 mA

192 192 mA

720 720 mA

1,136 1,016 mA

3,440 3,360 mA

160 160 mA

2,336 2,176 mA

August 2006

Rev. 1

6 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

6 Page

合計 : 11 ページ

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部品番号	部品説明	メーカ
WV3HG2128M64EEU-D4	2GB - 2x128Mx64 DDR2 SDRAM UNBUFFERED	White Electronic Designs
WV3HG2128M64EEU-D6	2GB - 2x128Mx64 DDR2 SDRAM UNBUFFERED	White Electronic Designs

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