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A6841 の電気的特性と機能
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A6841のメーカーはAllegro MicroSystemsです、この部品の機能は「DABiC-5 8-Bit Serial Input Latched Sink Drivers」です。 |
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製品の詳細 ( Datasheet PDF )
| 部品番号 A6841 |
| 部品説明 DABiC-5 8-Bit Serial Input Latched Sink Drivers |
| メーカ Allegro MicroSystems |
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www.DataSheet4U.com
A6841
DABiC-5 8-Bit Serial Input Latched Sink Drivers
Package A
18-pin DIP
Package LW
18-pin Wide Body SOIC
Package LW-20
20-pin Wide Body SOIC
ABSOLUTE MAXIMUM RATINGS
Output Voltage
VCE..............................................................50 V
VCE(SUS)(for inductiove load applications) .......35 V
Logic Supply Voltage, VDD...................................7 V
Emitter Supply Voltage, VEE.............................–20 V
Input Voltage Range, VIN ..............–0.3 V toVDD+0.3 V
Continuous Output Current (each output), IOUT ... 500 mA
Package Power Dissipation, PD, see chart, page 6
Operating Temperature Range
Ambient Temperature, TA ............–20°C to +85°C
Storage Temperature, TS ..........–55°C to +150°C
Caution: CMOS devices have input-static protection,
but are susceptible to damage when exposed to
extremely high static-electrical charges.
The merging of low-power CMOS logic and bipolar output power
drivers permit the A6841 integrated circuits to be used in a wide variety
of peripheral power driver applications. Each device has an eight-bit
CMOS shift register and CMOS control circuitry, eight CMOS data
latches, and eight bipolar current-sinking Darlington output drivers. The
500 mA NPN Darlington outputs, with integral transient-suppression
diodes, are suitable for use with relays, solenoids, and other inductive
loads.
All package variations of the A6841 offer premium performance with
a minimum output-breakdown voltage rating of 50 V (35 V sustaining).
All drivers can be operated with a split supply where the negative sup-
ply is up to –20 V.
The CMOS inputs are compatible with standard CMOS logic levels.
TTL circuits may require the use of appropriate pull-up resistors. By
using the serial data output, drivers can be cascaded for interface appli-
cations requiring additional drive lines.
The A6841SA devices are furnished in a standard 18-pin plastic DIP. The
A6841SLW device is available in an 18-lead SOIC package. A 20-pin
SOIC version, A6841SLW-20 has improved thermal characteristics. The
SOIC drivers are also available for operation to a temperature of –40°C
(part number suffix ELW). These devices are lead (Pb) free, with 100%
matte tin plated leadframes.
FEATURES
3.3 V to 5 V logic supply range
Power on reset (POR)
To 10 MHz data input rate
CMOS, TTL compatible inputs
–40°C operation available
Low-power CMOS logic and latches
Schmitt trigger inputs for
improved noise immunity
High-voltage current-sink outputs
Internal pull-up/pull down resistors
Output transient-protection diodes
Single or split supply operation
APPLICATIONS
Relays
Solenoids
Inductive loads
Use the following complete part numbers when ordering:
Part Number
A6841SA-T
A6841SLW-T
A6841SLW-20-T
A6841ELW-T
A6841ELW-20-T
Package
18-pin DIP
18-pin wide body SOIC
20-pin wide body SOIC
(enhanced thermals)
18-pin wide body SOIC
20-pin wide body SOIC
(enhanced thermals)
Ambient
–20ºC to +85ºC
–20ºC to +85ºC
–20ºC to +85ºC
–40ºC to +85ºC
–40ºC to +85ºC
1 Page
www.DataSheet4U.com
A6841
DABiC-5 8-Bit Serial Input Latched Sink Drivers
ELECTRICAL CHARACTERISTICS1 Unless otherwise noted: TA = 25°C, Vee = 0 V, logic supply operating
voltage Vdd= 3.0 V to 5.5 V
Vdd = 3.3 V
Vdd = 5 V
Characteristic
Symbol
Test Conditions
Min. Typ. Max. Min. Typ. Max.
Output Leakage Current
Output Sustaining Voltage
Collector–Emitter Saturation
Voltage
Input Voltage
Input Resistance
Serial Data Output Voltage
Maximum Clock Frequency2
Logic Supply Current
ICEX
VCE(SUS)
VCE(SAT)
VIN(1)
VIN(0)
RIN
VOUT(1)
VOUT(0)
fc
IDD(1)
IDD(0)
VOUT = 50 V
IOUT = 350 mA, L = 3 mH
IOUT = 100 mA
IOUT = 200 mA
IOUT = 350 mA
IOUT = –200 μA
IOUT = 200 μA
One output on, OE = L, ST = H
All outputs off, OE = H, ST = H,
P1 through P8 = L
– – 10 – – 10
35 –
– 35
–
–
– – 1.1 – – 1.1
– – 1.3 – – 1.3
– – 1.6 – – 1.6
2.2 –
– 3.3
–
–
– – 1.1 – – 1.7
50 –
– 50
–
–
2.8 3.05 – 4.5 4.75 –
– 0.15 0.3 – 0.15 0.3
10 –
– 10
–
–
– – 2.0 – – 2.0
– – 100 – – 100
Clamp Diode Leakage Current
Ir Vr = 50 V
– – 50 –
Clamp Diode Forward Voltage
Vf If = 350 mA
– – 2–
Output Enable-to-Output Delay
tdis(BQ)
ten(BQ)
VCC = 50 V, R1 = 500 Ω, C1 ≤ 30 pF
VCC = 50 V, R1 = 500 Ω, C1 ≤ 30 pF
–
–
– 1.0 –
– 1.0 –
Strobe-to-Output Delay
tp(STH-QL) VCC = 50 V, R1 = 500 Ω, C1 ≤ 30 pF
tp(STH-QH) VCC = 50 V, R1 = 500 Ω, C1 ≤ 30 pF
–
–
– 1.0 –
– 1.0 –
Output Fall Time
tf VCC = 50 V, R1 = 500 Ω, C1 ≤ 30 pF –
– 1.0 –
Output Rise Time
tr VCC = 50 V, R1 = 500 Ω, C1 ≤ 30 pF –
– 1.0 –
Clock-to-Serial Data Out Delay tp(CH-SQX) IOUT = ±200 μA
– 50 – –
1Positive (negative) current is defined as conventional current going into (coming out of) the specified device pin.
2Operation at a clock frequency greater than the specified minimum value is possible but not warranteed.
–
–
–
–
–
–
–
–
50
50
2
1.0
1.0
1.0
1.0
1.0
1.0
–
Truth Table
Units
μA
V
V
V
V
V
V
kΩ
V
V
MHz
mA
μA
μA
V
μs
μs
μs
μs
μs
μs
ns
Serial
Data Clock
Input Input
H
L
X
Shift Register Contents Serial
Data Strobe
I1 I2 I3 ... I8 Output Input
H R1 R2 ...
L R1 R2 ...
R1 R2 R3 ...
X X X ...
R7
R7
R8
X
R7
R7
R8
X
L
P1 P2 P3 ... P8 P8 H
L = Low Logic Level
H = High Logic Level
X = Irrelevant
P = Present State
R = Previous State
OE = Output Enable
ST = Strobe
Latch Contents
I1 I2 I3 ... I8
R1 R2 R3 ... R8
P1 P2 P3 ... P8
X X X ... X
Output
Enable
Input
L
H
Output Contents
I1 I2 I3 ... I8
P 1 P2 P3 ... P8
H H H ... H
www.allegromicro.com
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
3
3Pages
www.DataSheet4U.com
A6841
DABiC-5 8-Bit Serial Input Latched Sink Drivers
Package LW
(18-pin Wide Body SOIC)
1 18
Package A
(18-pin DIP)
VEE 1 SUB
CLOCK 2 CLK
SERIAL
DATA IN
3
LOGIC 4
GROUND
LOGIC
SUPPLY
5
VDD
SERIAL
DATA OUT
6
STROBE 7 ST
OUTPUT
ENABLE
8
OE
VEE 9 SUB
18 OUT 1
17 OUT2
16 OUT 3
15 OUT4
14 OUT5
13 OUT6
12 OUT7
11 OUT8
10 K
Note the 18-pin DIP package and the SOIC
packages are electrically identical and share
common terminal number assignments.
Package LW[TBD]
(20-pin Wide Body SOIC)
VEE
CLOCK
1
S UB
2 CLK
DATA IN 3
GND 4
LOG IC S UP P LY 5 VDD
DATA OUT 6
STROBE 7 ST
OUTPUT
E NABLE
8 OE
VEE
NO
CONNE CT.
9
S UB
10 NC
20 OUT 1
19 OUT 2
18 OUT 3
17 OUT 4
16 OUT 5
15 OUT 6
14 OUT 7
13 OUT 8
12 K
NO
NC 11 C ONNE C T .
Typical Application
Relay/solenoid driver using split supply
+5 V –15 V
+30 V
CLOCK
S E R IAL
DATA IN
S E R IAL
DATA OUT
S TR OBE
OUTPUT
E NABLE
1
S UB
2 CLK
3
4
5 V DD
6
7 ST
8 OE
9
S UB
18
17
16
15
14
13
12
11
10
www.allegromicro.com
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
6
6 Page
合計 : 10 ページ |
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| 部品番号 | 部品説明 | メーカ |
| A684 | PNP Transistor - 2SA684 |  Panasonic |
| A6841 | DABiC-5 8-Bit Serial Input Latched Sink Drivers | Allegro MicroSystems |