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MPC562 の電気的特性と機能

MPC562のメーカーはMotorola Semiconductorsです、この部品の機能は「(MPC562 / MPC563 / MPC564) RISC MCU Including Peripheral Pin Multiplexing with Flash and Code Compression Options」です。


製品の詳細 ( Datasheet PDF )

部品番号
MPC562
部品説明
(MPC562 / MPC563 / MPC564) RISC MCU Including Peripheral Pin Multiplexing with Flash and Code Compression Options
メーカ
Motorola Semiconductors
ロゴ

Motorola Semiconductors ロゴ 




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MPC562 Datasheet, MPC562 PDF,ピン配置, 機能
MOTOROLA
SEMICONDUCTOR
PRODUCT BRIEF
MPC561PB/D
Rev. 1, December 2001
MPC561/MPC562
MPC563/MPC564
Product Brief
MPC561/MPC562 / MPC563/MPC564 RISC MCU
Including Peripheral Pin Multiplexing with
Flash and Code Compression Options
Features
The MPC561/MPC562 / MPC563/MPC564 are members of the Motorola MPC500 RISC Microcontroller
family. As shown in the block diagram, they are composed of:
• High performance CPU system
— High performance core
• Single issue integer core
• Compatible with PowerPC instruction set architecture
• Precise exception model
• Floating point
• Extensive system development support
— On-chip watchpoints and breakpoints
— Program flow tracking
— Background debug mode (BDM)
— IEEE-ISTO Nexus 5001-1999 Class 3 Debug Interface
— MPC500 system interface (USIU, BBC, L2U)
— Fully static design
— Four major power saving modes
• On, doze, sleep, deep-sleep and power-down
— 32-Kbyte static RAM (CALRAM)
— 512-Kbyte flash (UC3F) on MPC563/MPC564
— General-purpose I/O support
• On address (24) and data (32) pins
• 16 GPIO in MIOS14
• Many peripheral pins can be used as GPIO when not used as primary functions
• 2.6-V outputs on external bus pins
• PPM (peripheral pin multiplexing with parallel-to-serial driver) module
• Available in package or die
— Plastic ball grid array (PBGA) packaging
Key Feature Details
MPC500 System Interface (USIU)
• System configuration and protection features:
— Periodic-interrupt timer
— Bus monitor
— Software watchdog timer
— Real-time clock (RTC)
This document contains information on a new product. Specifications and
information herein are subject to change without notice.
© MOTOROLA 2001, All Rights Reserved

1 Page





MPC562 pdf, ピン配列
General-Purpose I/O Support
• 24 Address pins and 32 data pins can be used for general-purpose I/O in single-chip mode
• 16 GPIO in MIOS14
• Many peripheral pins can be used as GPIO when not used as primary functions
• 2.6-V outputs on external bus pins
• 5-V outputs with slew rate control
NEXUS Debug Port (Class 3)
• Compliant with Class 3 of the IEEE-ISTO Nexus 5001-1999
• Program trace via branch trace messaging (BTM)
• Data trace via data write messaging (DWM) and data read messaging (DRM)
• Ownership trace via ownership trace messaging (OTM)
• Run-time access to on-chip memory map and MPC5xx special purpose registers (SPRs) via the
READI read/write access protocol
• Watchpoint messaging via the auxiliary port
• Reduced-port mode (1 MDI, 2 MDO) or full-port mode (2 MDI. 8 MDO)
• All features configurable and controllable via the auxiliary port
• Security features for production environment
• Supports the RCPU debug mode via the auxiliary port
• READI module can be reset independent of system reset
Integrated I/O System
Two Time Processor Units (TPU3)
• True 5-V I/O
• Two time processing units (TPU3) with16 channels each
• Each TPU3 is a micro-coded timer subsystem
• Eight-Kbytes of dual port TPU RAM (DPTRAM) shared by two TPU3 modules for TPU micro-code
22-Channel Modular I/O System (MIOS14)
• Six modulus counter sub-modules (MCSM)
• 10 double-action sub-modules (DASM)
• 12 dedicated PWM sub-modules (PWMSM)
• One MIOS14 16-bit parallel port I/O sub-modules (MPIOSM)
Two Enhanced Queued Analog-to-Digital Converter Modules (QADC64E)
• Two queued analog-to-digital converter modules (QADC64_A, QADC64_B) providing a total of 32
analog channels
• 16 analog input channels on each QADC64E module using internal multiplexing
• Directly supports up to four external multiplexers
• Up to 41 total input channels on the two QADC64E modules with external multiplexing
• Software configurable to operate in Enhanced or Legacy (MPC555 compatible) mode
• Unused analog channels can be used as digital input/output pins
— GPIO on all channels in Enhanced mode
• 10-bit A/D converter with internal sample/hold
• Typical conversion time of less than 5 µs (>200 K samples/second)
• Two conversion command queues of variable length
• Automated queue modes initiated by:
— External edge trigger
— Software command
— Periodic/interval timer within QADC64E module, that can be assigned to both queue 1 and 2
— External Gated trigger (queue 1only)
• 64 result registers
— Output data is right- or left-justified, signed or unsigned
MPC561/MPC563
PRODUCT BRIEF
MOTOROLA
3


3Pages


MPC562 電子部品, 半導体
0x00 0000
0x07 FFFF
0x08 0000
UC3F Flash*
512 Kbytes
Reserved for Flash
2,605 Kbytes
0x2F 7FFF
0x2F 8000
0x2F 8800
0x2F A000
0x2F BFFF
0x2F C000
0x2F FFFF
BBC DECRAM 2 Kbytes
Reserved for BBC
BBC CONTROL
USIU & Flash Control
16 Kbytes
0x30 0000
UIMB I/F & IMB
0x30 7FFF
Modules
32 Kbytes
0x30 8000
Reserved for IMB
0x37 FFFF
491 Kbytes
0x38 0000
0x38 00FF
CALRAM/
READI Control
256 bytes
0x38 0100 Reserved (L-bus Control)
0x38 3FFF
~32 Kbytes
0x38 4000
Reserved (L-bus Mem)
464 Kbytes
0x2F C000
USIU Control Registers
UC3F Control
Registers*
0x2F C800
0x30 0000
DPTRAM Control (32 bytes)
Reserved (8160 bytes)
0x30 0020
DPTRAM (8 Kbytes)
0x30 2000
TPU3_A (1 Kbyte)
TPU3_B (1 Kbyte)
QADC64_A (1 Kbyte)
QADC64_B (1 Kbyte)
QSMCM (1 Kbyte)
Reserved (2 Kbytes)
PPM (64 bytes)
Reserved (960 bytes)
MIOS14 (4 Kbytes)
0x30 4000
0x30 4400
0x30 4800
0x30 4C00
0x30 5000
0x30 5400
0x30 5C00
0x30 5C80
0x30 6000
0x3F 7FFF
0x3F 8000
0x3F F000
0x3F FFFF
CALRAM
32 Kbytes
4-Kbyte Overlay Section
*NOTE: Only available on MPC563/MPC564.
TOUCAN_A (1 Kbyte)
TOUCAN_B (1 Kbyte)
TOUCAN_C (1 Kbyte)
Reserved (896 bytes)
UIMB Registers
(128 bytes)
0x30 7000
0x30 7400
0x30 7800
0x30 7C00
0x30 7F80
0x30 7FFF
Figure 2 MPC561 / MPC563 Internal Memory Map
MPC561/MPC563
PRODUCT BRIEF
MOTOROLA
6

6 Page

合計 : 12 ページ
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