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MSM6636 の電気的特性と機能

MSM6636のメーカーはOKI electronic componetsです、この部品の機能は「SAE-J1850 Communication Protocol Conformity Transmission Controller for Automotive LAN」です。


製品の詳細 ( Datasheet PDF )

部品番号
MSM6636
部品説明
SAE-J1850 Communication Protocol Conformity Transmission Controller for Automotive LAN
メーカ
OKI electronic componets
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OKI electronic componets ロゴ 




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MSM6636 Datasheet, MSM6636 PDF,ピン配置, 機能
¡¡SemicondSucetormiconductor
MSM6636
MSM6636
SAE-J1850 Communication Protocol Conformity Transmission Controller for Automo-
tive LAN
GENERAL DESCRIPTION
The MSM6636 is a transmission controller for automotive LAN based on data communication
protocol SAE-J1850. This LSI can realize a data bus topology bus LAN system with a PWM bit
encoding method (41.6 K bps). In addition to a protocol control circuit, MSM6636 has an enclosed
quartz oscillation circuit, host CPU interface (clock synchronous serial / UART), a transmit/
receive buffer, and a bus receiver circuit that decreases the burden on the host CPU.
FEATURES
• Based on SAE-J1850 CLASS B DATA COMMUNICATION NETWORK INTERFACE (issued
August 12, 1991)
• CSMA/CD (Carrier-sense multiple access with collision detection)
• Internal transmit buffer (1 frame) and receive buffer (2 frames)
• Bit encoding: PWM (Pulse Width Modulation)
• Transmission Speed: 41.6K bps
• Multi-address setting with physical addressing: 1 type / functional addressing: 15 types
• Address filter function by multi-addressing (broadcasting possible)
• Automatic retransmission function by arbitration loss and non ACK
• 3 types of in-frame response support:
q Single-byte response from a single recipient
w Multi-byte response from a single recipient (with CRC code)
e Single-byte response from multiple recipients (ID response as ACK)
• Error detection by cyclic redundancy check (CRC)
• Various communication error detections
• Dual-wire bus abnormality detection by internal bus receiver and fault tolerance function
• Host CPU interface is LSB first / serial, 4 modes supported
q Clock synchronous serial (no parity)
Normal mode: 8-bit data
MPC Mode: 8-bit data + MPC bit (1: address / 0: data select bit)
w UART (yes/no parity selectable)
Normal mode: 1 start bit + 8-bit data + (parity) + 1 stop bit
MPC mode: 1 start bit + 8-bit data + MPC bit + (parity) + 1 stop bit
• Sleep Function
Low current consumption mode by oscillation stop (IDS Max < 50µA)
SLEEP / WAKE UP control from host CPU, WAKE UP via LAN bus
• Available package 18pin DIP, 18 pin QFJ (PLCC) and 24pin SOP.
1

1 Page





MSM6636 pdf, ピン配列
¡ Semiconductor
MSM6636
PIN CONFIGURATION (TOP VIEW)
18pin Plastic DIP
18pin Plastic QFJ
24pin Plastic SOP
AVDD 1
BO– 2
BI– 3
BI+ 4
BO+ 5
AGND 6
U-C 7
M-N 8
DGND 9
1 8 DVDD
1 7 RES
1 6 INT BI– 3
1 5 TXD BI+ 4
1 4 RXD
1
3
SCLK
/PAE
1 2 A-D
1 1 OSC0
BO+ 5
AGND 6
U-C 7
1 0 OSC1
AVDD 1
2 1 18 17
BO– 2
BI– 3
16 INT
BI+ 4
BO+ 5
15 TXD NC 6
14 RXD
13
SCLK
/PAE
12 A-D
NC 7
NC 8
AGND 9
U-C 10
M-N 11
8 9 10 11
DGND 12
24 DVDD
23 RES
22 INT
21 TXD
20 RXD
19 NC
18 NC
17 NC
16 SCLK/PAE
15 A-D
14 OSC0
13 OSC1
NC: No Connection
PIN DESCRIPTION
Pin Name
AVDD
BO –
BI –
BI +
BO +
AGND
U-C
M-N
DGND
OSC 1
OSC 0
A-D
SCLK / PAE
RXD
TXD
INT
RES
DVDD
Pin #
DIP/
SOP
QFJ
11
22
33
44
55
69
7 10
8 11
9 12
10 13
11 14
12 15
I/O
O
I
I
O
I
I
O
I
I
13 16 I
14 20 I
15 21 O
16 22 O
17 23 I
18 24 —
Function
Analog power supply pin
LAN - BUS output –
LAN - BUS input –
LAN - BUS input +
LAN - BUS output +
Analog ground pin
0: UART 1: clock synchronous serial select pin
0: MPC mode
1:normal mode select pin
Digital ground pin
Crystal oscillation output
Crystal oscillation input
0: data communication
1: address communication
Serial clock input/Parity select pin
Serial data input pin
Serial data output pin
Interrupt output pin
Reset input pin
Digital power supply pin
3


3Pages


MSM6636 電子部品, 半導体
MSM6636
¡ Semiconductor
AC Chacteristics
PWM Bit Timing
Parameter
Symbol
Bit Length
"1" Dominant Width
"0" Dominant Width
"SOF" Dominant Width
"SOF,BRK" Length
"BRK" Dominant Width
"EOD" + Bit Length
"EOF" + Bit Length
"EOF + IFS" + Bit Length
"0" Passive Width
TP1
TP2
TP3
TP4
TP5
TP6
TP7
TP8
TP9
TP10
min
23.64
6.90
14.87
30.54
47.28
38.42
47.28
70.92
94.56
8.86
Transmit
typ
24.00
7.00
15.00
31.00
48.00
39.00
48.00
72.00
96.00
9.00
max
24.36
7.11
15.23
31.47
48.72
39.59
48.72
9.14
Receive
min max
21.00 28.00
5.00 12.00
13.00 20.00
29.00 36.00
45.00 52.00
37.00 44.00
43.00 51.00
69.00 76.00
86.00
4.00 15.00
Note: DVDD = AVDD = 5 V ± 10%, Ta = -40 ~ +125˚C, In setting 41.6 K bps
Dominant
"1"
Passive
TP2
Unit
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
Dominant
"0 "
Passive
Dominant
" SOF "
Passive
Dominant
" EOD "
Passive
Dominant
" EOF "
" IFS "
Passive
Dominant
" BRK "
Passive
TP3
TP1
TP10
TP4
TP5
LAST BIT
TP7
EOD
LAST BIT
EOF
TP8
TP9
TP6
TP5
IFS
6

6 Page

合計 : 11 ページ
PDF ダウンロード

[ MSM6636 データシート.PDF ]

データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。

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部品番号部品説明メーカ
MSM6636

SAE-J1850 Communication Protocol Conformity Transmission Controller for Automotive LAN

OKI electronic componets
OKI electronic componets
MSM6636B

SAE-J1850 Multiplex Communication Protocol Conformity Transmission Controller for Automotive LAN

OKI electronic componets
OKI electronic componets

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