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LT1011 の電気的特性と機能
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LT1011のメーカーはLinear Technologyです、この部品の機能は「Voltage Comparator」です。 |
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製品の詳細 ( Datasheet PDF )
| 部品番号 LT1011 |
| 部品説明 Voltage Comparator |
| メーカ Linear Technology |
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このページの下部にプレビューとLT1011ダウンロード（pdfファイル）リンクがあります。 Total 16 pages |
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FEATURES
s Pin Compatible with LM111 Series Devices
s Guaranteed Max 0.5mV Input Offset Voltage
s Guaranteed Max 25nA Input Bias Current
s Guaranteed Max 3nA Input Offset Current
s Guaranteed Max 250ns Response Time
s Guaranteed Min 200,000 Voltage Gain
s 50mA Output Current Source or Sink
s ±30V Differential Input Voltage
s Fully Specified for Single 5V Operation
U
APPLICATIO S
s SAR A/D Converters
s Voltage-to-Frequency Converters
s Precision RC Oscillator
s Peak Detector
s Motor Speed Control
s Pulse Generator
s Relay/Lamp Driver
, LTC and LT are registered trademarks of Linear Technology Corporation.
LT1011/LT1011A
Voltage Comparator
DESCRIPTIO
The LT®1011 is a general purpose comparator with sig-
nificantly better input characteristics than the LM111.
Although pin compatible with the LM111, it offers four
times lower bias current, six times lower offset voltage and
five times higher voltage gain. Offset voltage drift, a
previously unspecified parameter, is guaranteed at
15µV/°C. Additionally, the supply current is lower by a
factor of two with no loss in speed. The LT1011 is several
times faster than the LM111 when subjected to large
overdrive conditions. It is also fully specified for DC
parameters and response time when operating on a single
5V supply. These parametric improvements allow the
LT1011 to be used in high accuracy (≥12-bit) systems
without trimming. In a 12-bit A/D application, for instance,
using a 2mA DAC, the offset error introduced by the
LT1011 is less than 0.5LSB. The LT1011 retains all the
versatile features of the LM111, including single 3V to
±18V supply operation, and a floating transistor output
with 50mA source/sink capability. It can drive loads refer-
enced to ground, negative supply or positive supply, and
is specified up to 50V between V– and the collector output.
A differential input voltage up to the full supply voltage is
allowed, even with ±18V supplies, enabling the inputs to
be clamped to the supplies with simple diode clamps.
TYPICAL APPLICATIO
10µs 12-Bit A/D Converter
R1
1k
FULL-SCALE
TRIM
LM329
7V
3.9k
R2* R3
15V
6.49k
6.98k
0.001µF
20 14
15
16
15V
–15V
17
19
*R2 AND R4
SHOULD TC TRACK
INPUT
0V TO 10V
5V
6012
12-BIT
13 D/A CONVERTER 18
PARALLEL
OUTPUTS
12 11 10 9 8 7 6 5 4 3 2 1
PARALLEL
OUTPUTS
R4*
2.49k
R6
820Ω
2+
LT1011A
3–
R5
1k
7
24
5V
4 5 6 7 8 9 16 17 18 19 20 21
AM2504
SAR REGISTER
ES
D
CC
CP S
SERIAL OUTPUT
7475
LATCH
12
START
CLOCK f = 1.4MHz
1011 TA01
Response Time vs Overdrive
500
450
400
350
300
250
200
150
100
50
0
0.1
FALLING
OUTPUT
RISING
OUTPUT
1 10
OVERDRIVE (mV)
100
1011 TA02
1
1 Page
LT1011/LT1011A
ELECTRICAL CHARACTERISTICS
The q denotes the specifications which apply over the full operating temperature range, otherwide specifications are at TA = 25°C.
VS = ±15V, VCM = 0V, RS = 0Ω, V1 = –15V, output at pin 7 unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
LT1011AC/AI/AM
MIN TYP MAX
∆VOS
∆T
Input Offset Voltage Drift
(Note 6)
TMIN ≤ T ≤ TMAX
q 4 15
AVOL
CMRR
*Large-Signal Voltage Gain
Common Mode
Rejection Ratio
RL = 1k to 15V,
–10V ≤ VOUT ≤ 14.5V
RL = 500Ω to 5V,
0.5V ≤ VOUT ≤ 4.5V
200 500
50 300
94 115
*Input Voltage Range
(Note 9)
VS = ±15V
VS = Single 5V
q –14.5
q 0.5
13
3
tD *Response Time
(Note 7)
150 250
VOL *Output Saturation Voltage, VIN = 5mV, ISINK = 8mA, TJ ≤ 100°C
V1 = 0
VIN = 5mV, ISINK = 8mA
q
VIN = 5mV, ISINK = 50mA
q
0.25 0.40
0.25 0.45
0.70 1.50
*Output Leakage Current
VIN = 5mV, V1 = –15V,
VOUT = 35V (25V for LT1011C/I)
q
0.2 10
500
*Positive Supply Current
3.2 4.0
*Negative Supply Current
1.7 2.5
*Strobe Current
(Note 8)
Minimum to Ensure Output
Transistor is Off
500
Input Capacitance
6
LT1011C/I/M
MIN TYP MAX
4 25
UNITS
µV/°C
200 500
V/mV
50 300
V/mV
90 115
dB
– 14.5
0.5
150
0.25
0.25
0.70
0.2
3.2
1.7
500
13
3
250
0.40
0.45
1.50
10
500
4.0
2.5
V
V
ns
V
V
V
nA
nA
mA
mA
µA
6 pF
*Indicates parameters which are guaranteed for all supply voltages, including a single 5V supply. See Note 5.
Note 1: Absolute Maximum Ratings are those values beyond which the
life of a device may be impaired.
Note 2: Inputs may be clamped to supplies with diodes so that
maximum input voltage actually exceeds supply voltage by one diode
drop. See Input Protection in the Applications Information section.
Note 3: TJMAX = 150°C.
Note 4: Output is sinking 1.5mA with VOUT = 0V.
Note 5: These specifications apply for all supply voltages from a single
5V to ±15V, the entire input voltage range, and for both high and low
output states. The high state is ISINK ≥ 100µA, VOUT ≥ (V+ – 1V) and
the low state is ISINK ≤ 8mA, VOUT ≤ 0.8V. Therefore, this specification
defines a worst-case error band that includes effects due to common
mode signals, voltage gain and output load.
Note 6: Drift is calculated by dividing the offset voltage difference
measured at min and max temperatures by the temperature difference.
Note 7: Response time is measured with a 100mV step and 5mV
overdrive. The output load is a 500Ω resistor tied to 5V. Time
measurement is taken when the output crosses 1.4V.
Note 8: Do not short the STROBE pin to ground. It should be current
driven at 3mA to 5mA for the shortest strobe time. Currents as low as
500µA will strobe the LT1011A if speed is not important. External
leakage on the STROBE pin in excess of 0.2µA when the strobe is “off”
can cause offset voltage shifts.
Note 9: See graph “Input Offset Voltage vs Common Mode Voltage.”
3
3Pages
LT1011/LT1011A
TYPICAL PERFOR A CE CHARACTERISTICS
Input Offset Voltage
vs Common Mode Voltage
2.5
TJ = 25°C
2.0
1.5
1.0 UPPER
COMMON MODE
0.5 LIMIT = V + – (1.5V)
0
– 0.5
–1.0
–1.5 V – (OR GND WITH
SINGLE SUPPLY)
– 2.0
–
2.5
V
–
0.1
0.2
0.3
0.4
0.5
0.6
0.7
COMMON MODE VOLTAGE (V)
V+
1011 G19
Offset Pin Characteristics
0.8
0.6
0.4
0.2
CHANGE IN VOS FOR CURRENT
INTO PINS 5 OR 6
0
–150mV
VOLTAGE ON PINS 5 AND 6
WITH RESPECT TO V +
–100mV
– 50mV
0
– 50 – 25
0 25 50 75 100 125 150
TEMPERATURE (°C)
1011 G20
APPLICATIONS INFORMATION
Preventing Oscillation Problems
Oscillation problems in comparators are nearly always
caused by stray capacitance between the output and
inputs or between the output and other sensitive pins on
the comparator. This is especially true with high gain
bandwidth comparators like the LT1011, which are
designed for fast switching with millivolt input signals.
The gain bandwidth product of the LT1011 is over 10GHz.
Oscillation problems tend to occur at frequencies around
5MHz, where the LT1011 has a gain of ≈ 2000. This
implies that attenuation of output signals must be at
least 2000:1 at 5MHz as measured at the inputs. If the
source impedance is 1kΩ, the effective stray capaci-
tance between output and input must have a reactance
of more than (2000)(1kΩ) = 2MΩ, or less than 0.02pF.
The actual interlead capacitance between input and out-
put pins on the LT1011 is less than 0.002pF when cut to
printed circuit mount length. Additional stray capaci-
tance due to printed circuit traces must be minimized by
routing the output trace directly away from input lines
and, if possible, running ground traces next to input
traces to provide shielding. Additional steps to ensure
oscillation-free operation are:
1. Bypass the STROBE/BALANCE pins with a 0.01µF
capacitor connected from Pin 5 to Pin 6. This elimi-
nates stray capacitive feedback from the output to the
BALANCE pins, which are nearly as sensitive as the
inputs.
2. Bypass the negative supply (Pin 4) with a 0.1µF
ceramic capacitor close to the comparator. 0.1µF can
also be used for the positive supply (Pin 8) if the pull-
up load is tied to a separate supply. When the pull-up
load is tied directly to Pin 8, use a 2µF solid tantalum
bypass capacitor.
3. Bypass any slow moving or DC input with a capacitor
(≥ 0.01µF) close to the comparator to reduce high
frequency source impedance.
4. Keep resistive source impedance as low as possible. If
a resistor is added in series with one input to balance
source impedances for DC accuracy, bypass it with a
capacitor. The low input bias current of the LT1011
usually eliminates any need for source resistance bal-
ancing. A 5kΩ imbalance, for instance, will create only
0.25mV DC offset.
5. Use hysteresis. This consists of shifting the input
offset voltage of the comparator when the output
changes state. Hysteresis forces the comparator to
move quickly through its linear region, eliminating
oscillations by “overdriving” the comparator under all
input conditions. Hysteresis may be either AC or DC.
AC techniques do not shift the apparent offset voltage
6
6 Page
合計 : 16 ページ |
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データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。 |
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