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ADAS3023 の電気的特性と機能
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ADAS3023のメーカーはAnalog Devicesです、この部品の機能は「16-Bit 8-Channel Simultaneous Sampling Data Acquisition System」です。 |
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製品の詳細 ( Datasheet PDF )
| 部品番号 ADAS3023 |
| 部品説明 16-Bit 8-Channel Simultaneous Sampling Data Acquisition System |
| メーカ Analog Devices |
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Data Sheet
16-Bit, 8-Channel Simultaneous
Sampling Data Acquisition System
ADAS3023
FEATURES
Ease-of-use, 16-bit complete data acquisition system
Simultaneous sampling selection of 2, 4, 6, and 8 channels
Differential input voltage range: ±20.48 V maximum
High impedance 8-channel input: >500 MΩ
High input common-mode rejection: 95.0 dB
User-programmable input ranges
On-chip 4.096 V reference and buffer
No latency/pipeline delay (SAR architecture)
Serial 4-wire 1.8 V to 5 V SPI-/SPORT-compatible interface
40-lead LFCSP package (6 mm × 6 mm)
−40°C to +85°C industrial temperature range
APPLICATIONS
Multichannel data acquisition and system monitoring
Process control
Power line monitoring
Automated test equipment
Patient monitoring
Spectrum analysis
Instrumentation
GENERAL DESCRIPTION
The ADAS3023 is a complete 16-bit successive approximation-
based analog-to-digital data acquisition system. This device is
capable of simultaneously sampling up to 500 kSPS for two
channels, 250 kSPS for four channels, 167 kSPS for six chan-
nels, and 125 kSPS for eight channels manufactured on the Analog
Devices, Inc., proprietary iCMOS® high voltage industrial process
technology.
The ADAS3023 integrates eight channels of low leakage track
and hold, a programmable gain instrumentation amplifier
(PGIA) stage with a high common-mode rejection offering four
differential input ranges, a precision low drift 4.096 V reference
and buffer, and a 16-bit charge redistribution successive approxi-
mation register (SAR) analog-to-digital converter (ADC). The
ADAS3023 can resolve differential input ranges of up to ±20.48 V
when using ±15 V supplies.
DIFF TO
COM
IN0
IN1
IN2
IN3
IN4
IN5
IN6
IN7
COM
FUNCTIONAL BLOCK DIAGRAM
VDDH AVDD DVDD VIO
RESET
PD
TRACK
AND
HOLD
PGIA
LOGIC/
INTERFACE
PulSAR
ADC
ADAS3023
BUF
REF
VSSH AGND DGND REFx
Figure 1.
CNV
BUSY
CS
SCK
DIN
SDO
REFIN
The ADAS3023 simplifies design challenges by eliminating
signal buffering, level shifting, amplification and attenuation,
common-mode rejection, settling time, or any of the other
analog signal conditioning challenges, yet allows for smaller
form factor, faster time to market, and lower costs.
The ADAS3023 is factory calibrated and its operation is
specified from −40°C to +85°C.
Table 1. Typical Input Range Selection
Single-Ended Signals1
Input Range, VIN
0 V to 1 V
±1.28 V
0 V to 2.5 V
±2.56 V
0 V to 5 V
±5.12 V
0 V to 10 V
±10.24 V
1 See Figure 39 and Figure 40 in the Analog Inputs section for more
information.
Rev. A
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2013–2014 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 Page
ADAS3023
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Timing Specifications .................................................................. 6
Absolute Maximum Ratings............................................................ 9
ESD Caution.................................................................................. 9
Pin Configuration and Function Descriptions........................... 10
Typical Performance Characteristics ........................................... 12
Terminology .................................................................................... 17
Theory of Operation ...................................................................... 19
Overview...................................................................................... 19
Operation..................................................................................... 19
Transfer Functions...................................................................... 20
REVISION HISTORY
2/14—Rev. 0 to Rev. A
Changes to Table 2............................................................................ 5
Changes to Figure 38...................................................................... 21
5/13—Revision 0: Initial Version
Data Sheet
Typical Application Connection Diagram.............................. 21
Analog Inputs ............................................................................. 21
Voltage Reference Input/Output .............................................. 22
Power Supply............................................................................... 24
Power Dissipation Modes.......................................................... 24
Conversion Modes ..................................................................... 25
Digital Interface .............................................................................. 26
Conversion Control ................................................................... 26
RESET and Power-Down (PD) Inputs .................................... 26
Serial Data Interface................................................................... 27
General Timing .......................................................................... 28
Configuration Register .............................................................. 29
Packaging and Ordering Information ......................................... 30
Outline Dimensions................................................................... 30
Ordering Guide .......................................................................... 30
Rev. A | Page 2 of 32
3Pages
Data Sheet
ADAS3023
Parameter
IVDDH
IVSSH
IAVDD
IDVDD
IVIO
Power Supply Sensitivity
TEMPERATURE RANGE
Specified Performance
Test Conditions/Comments
Two channels
Four channels
Six channels
Eight channels
PD = 1
Two channels
Four channels
Six channels
Eight channels
All PGIA gains, PD = 1
All PGIA gains, PD = 0, reference buffer enabled
All PGIA gains, PD = 0, reference buffer disabled
All PGIA gains, PD = 1
All PGIA gains, PD = 0
All PGIA gains, PD = 1
All PGIA gains, PD = 0, VIO = 3.3 V
All PGIA gains, PD = 1
External reference, TA = 25°C
PGIA gain = 0.2 or 0.4, VDDH/VSSH = ±15 V ± 5%
PGIA gain = 0.8, VDDH/VSSH = ±15 V ± 5%
PGIA gain = 1.6, VDDH/VSSH = ±15 V ± 5%
PGIA gain = 0.2 or 0.4, AVDD, DVDD = ±5 V ± 5%
PGIA gain = 0.8, AVDD, DVDD = ±5 V ± 5%
PGIA gain = 1.6, AVDD, DVDD = ±5 V ± 5%
Min
−5.5
−6.5
−10.0
−10.0
TMIN to TMAX
−40
Typ Max
5.0 5.5
6.0 7.0
9.5 10.5
9.5 10.5
10.0
−5.0
−5.5
−8.5
−8.5
10.0
16.0 17.0
15.5
100
2.5 3
100
1.0
10.0
±0.1
±0.2
±0.4
±1.0
±1.5
±2.5
+85
Unit1
mA
mA
mA
mA
µA
mA
mA
mA
mA
µA
mA
mA
µA
mA
µA
mA
µA
LSB
LSB
LSB
LSB
LSB
LSB
°C
1 The LSB unit means least significant bit. The weight of the LSB, referred to input, changes depending on the input voltage range. See the Programmable Gain section
for the LSB size.
2 Full-scale differential input ranges of ±2.56 V, ±5.12 V, ±10.24 V, and ±20.48 V are set by the configuration register.
3 If using the external multiplexer in front of the ADAS3023, it must be switched at least 820 ns prior to the rising edge of CNV.
4 See the Terminology section. These parameters are specified at ambient temperature with an external reference. All other influences of temperature and supply are
measured and specified separately.
5 All ac specifications expressed in decibels are referenced to the full-scale input range (FSR) and are tested with an input signal at 0.5 dB below full scale, unless
otherwise specified.
6 This is the output from the internal band gap reference.
7 There is no pipeline delay. Conversion results are available immediately after a conversion is completed.
Rev. A | Page 5 of 32
6 Page
合計 : 30 ページ |
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| 部品番号 | 部品説明 | メーカ |
| ADAS3023 | 16-Bit 8-Channel Simultaneous Sampling Data Acquisition System | Analog Devices |