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ADE7816 の電気的特性と機能
ADE7816のメーカーはAnalog Devicesです、この部品の機能は「Energy Metering IC」です。 |
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製品の詳細 ( Datasheet PDF )
部品番号 ADE7816 |
部品説明 Energy Metering IC |
メーカ Analog Devices |
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Data Sheet
Six Current Channels, One Voltage Channel
Energy Metering IC
ADE7816
FEATURES
Measures active and reactive energy, sampled waveforms,
and current and voltage rms
6 current input channels and 1 voltage channel
<0.1% error in active and reactive energy over a dynamic
range of 1000:1
Supports current transformer and Rogowski coil sensors
Provides instantaneous current and voltage readings
Angle measurements on all 6 channels
2 kHz bandwidth operation
Reference: 1.2 V (drift 10 ppm/°C typical) with external
overdrive capability
Flexible I2C, SPI, and HSDC serial interfaces
GENERAL DESCRIPTION
The ADE7816 is a highly accurate, multichannel metering
device that is capable of measuring one voltage channel and up
to six current channels. It measures line voltage and current and
calculates active and reactive energy, as well as instantaneous rms
voltage and current. The device incorporates seven sigma-delta
(Σ-Δ) ADCs with a high accuracy energy measurement core.
The six current input channels allow multiple loads to be measured
simultaneously. The voltage channel and the six current channels
each have a complete signal path allowing for a full range of
measurements. Each input channel supports a flexible gain stage
and is suitable for use with current transformers (CTs). Six on-
chip digital integrators facilitate the use of the Rogowski coil
sensors.
The ADE7816 provides access to on-chip meter registers via either
the SPI or I2C interface. A dedicated high speed interface, the
high speed data capture (HSDC) port, can be used in conjunction
with I2C to provide access to real-time ADC output information.
A full range of power quality information, such as overcurrent,
overvoltage, peak, and sag detection, is accessible via the two
external interrupt pins, IRQ0 and IRQ1.
The ADE7816 energy metering IC operates from a 3.3 V supply
voltage and is available in a 40-lead LFCSP that is Pb free and
RoHS compliant.
CLKIN 27
CLKOUT 28
VP 15
VN 16
IAP 7
IAN 8
IBP 9
IBN 12
ICP 13
ICN 14
IDP 23
RESET
4
1.2V
REF
PGA2
PGA1
PGA1
PGA1
PGA3
REFIN/OUT
17
FUNCTIONAL BLOCK DIAGRAM
DGND
6
VGAIN
ADC
IAGAIN
PCF_A_COEFF
HPF
DIGITAL
INTEGRATOR
ADC
HPF
ADC
ADC
ADC
ENERGY AND RMS CALCULATIONS SEE
CHANNEL A FOR DETAILED SIGNAL PATH
ENERGY AND RMS CALCULATIONS SEE
CHANNEL A FOR DETAILED SIGNAL PATH
ENERGY AND RMS CALCULATIONS SEE
CHANNEL A FOR DETAILED SIGNAL PATH
VRMSOS
X2
LPF
VRMS
AWATTOS AWGAIN
LPF
COMPUTATIONAL
BLOCK FOR
TOTAL
REACTIVE POWER
AVAROS
AVARGAIN
ENERGY
AND RMS
DATA
ALL
CHANNELS
IARMSOS
X2
LPF
IARMS
IEP 22
PGA3
ADC
ENERGY AND RMS CALCULATIONS SEE
CHANNEL A FOR DETAILED SIGNAL PATH
IFP 19
IN 18
PGA3
ADC
ENERGY AND RMS CALCULATIONS SEE
CHANNEL A FOR DETAILED SIGNAL PATH
POR
LDO
LDO
ADE7816
SPI/I2C
I2C
HSDC
26 25
VDD AGND
Figure 1.
24
AVDD
5
DVDD
40 34 33 31
NC NC NC NC
2 PULL_HIGH
3 PULL_LOW
29 IRQ0
32 IRQ1
36 SCLK/SCL
38 MOSI/SDA
37 MISO/HSD
39 SS/HSA
35 HSCLK
1 NC
10 NC
11 NC
20 NC
21 NC
30 NC
Rev. A
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2012–2013 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 Page


ADE7816
TABLE OF CONTENTS
Features .............................................................................................. 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Timing Characteristics ................................................................ 5
Absolute Maximum Ratings............................................................ 8
Thermal Resistance ...................................................................... 8
ESD Caution.................................................................................. 8
Pin Configuration and Function Descriptions............................. 9
Typical Performance Characteristics ........................................... 11
Test Circuit ...................................................................................... 14
Terminology .................................................................................... 15
Quick Start....................................................................................... 16
Inputs................................................................................................ 17
Power and Ground ..................................................................... 17
Reference Circuit ........................................................................ 17
Reset ............................................................................................. 17
CLKIN and CLKOUT................................................................ 18
Analog Inputs.............................................................................. 18
Energy Measurements.................................................................... 20
Starting and Stopping the DSP ................................................. 20
Active Energy Measurement..................................................... 20
Reactive Energy Measurement ................................................. 21
Line Cycle Accumulation Mode............................................... 22
Root Mean Square Measurement ............................................. 23
No Load Detection ..................................................................... 23
Energy Calibration ......................................................................... 24
Channel Matching ...................................................................... 24
REVISION HISTORY
12/13—Rev. 0 to Rev. A
Changes to EPAD Notation and Changed Pin 33 and Pin 34
Descriptions ...................................................................................... 9
Changes to Energy Phase Calibration Section ........................... 25
Changes to Zero-Crossing Detection Section and Figure 33 ... 26
Changes to Indication of Power Direction Section.................... 28
Changes to Table 12........................................................................ 38
Changes to Bits[7:6] Description; Table 26 ................................. 43
2/12—Revision 0: Initial Version
Data Sheet
Energy Gain Calibration ........................................................... 24
Energy Offset Calibration ......................................................... 24
Energy Phase Calibration.......................................................... 25
RMS Offset Calibration ............................................................. 25
Power Quality Features.................................................................. 26
Selecting a Current Channel Group ........................................ 26
Instantaneous Waveforms ......................................................... 26
Zero-Crossing Detection........................................................... 26
Peak Detection............................................................................ 27
Overcurrent and Overvoltage Detection ................................ 27
Indication of Power Direction .................................................. 28
Angle Measurements ................................................................. 28
Period Measurement.................................................................. 29
Voltage Sag Detection ................................................................ 29
Setting the SAGCYC Register................................................... 29
Setting the SAGLVL Register.................................................... 29
Voltage Sag Interrupt ................................................................. 29
Checksum.................................................................................... 30
Outputs ............................................................................................ 31
Interrupts..................................................................................... 31
Communication ......................................................................... 31
Registers........................................................................................... 36
Register Protection..................................................................... 36
Register Format .......................................................................... 36
Register Maps.............................................................................. 37
Outline Dimensions ....................................................................... 45
Ordering Guide .......................................................................... 45
Rev. A | Page 2 of 48
3Pages


Data Sheet
ADE7816
TIMING CHARACTERISTICS
VDD = 3.3 V ± 10%, AGND = DGND = 0 V, on-chip reference, CLKIN = 16.384 MHz, TMIN to TMAX = −40°C to +85°C. Note that, within
the timing tables and diagrams, the dual function pin names are referenced by the relevant function only; see the Pin Configuration and
Function Descriptions section for full pin mnemonics and function descriptions.
I2C-Compatible Interface Timing
Table 2. I2C-Compatible Interface Timing Parameters
Parameter
SCL Clock Frequency
Hold Time (Repeated) Start Condition
Low Period of SCL Clock
High Period of SCL Clock
Setup Time for Repeated Start Condition
Data Hold Time
Data Setup Time
Rise Time of Both SDA and SCL Signals
Fall Time of Both SDA and SCL Signals
Setup Time for Stop Condition
Bus Free Time Between a Stop and Start Condition
Pulse Width of Suppressed Spikes
Symbol
fSCL
tHD;STA
tLOW
tHIGH
tSU;STA
tHD;DAT
tSU;DAT
tR
tF
tSU;STO
tBUF
tSP
Standard Mode
Min Max
0 100
4.0
4.7
4.0
4.7
0 3.45
250
1000
300
4.0
4.7
N/A1
Fast Mode
Min Max
0 400
0.6
1.3
0.6
0.6
0 0.9
100
20 300
20 300
0.6
1.3
50
Unit
kHz
μs
μs
μs
μs
μs
ns
ns
ns
μs
μs
ns
1 N/A means not applicable.
SDA
tF
tLOW
tR
SCL
tHD;STA tHD;DAT
START
CONDITION
tSU;DAT
tR
tHD;STA
tSP tR
tBUF
tHIGH
tSU;STA
REPEATED START
CONDITION
Figure 2. I2C-Compatible Interface Timing
tSU;STO
STOP
START
CONDITION CONDITION
Rev. A | Page 5 of 48
6 Page
合計 : 30 ページ |
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