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ADP1974 の電気的特性と機能
ADP1974のメーカーはAnalog Devicesです、この部品の機能は「Synchronous PWM Controller」です。 |
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製品の詳細 ( Datasheet PDF )
部品番号 ADP1974 |
部品説明 Synchronous PWM Controller |
メーカ Analog Devices |
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Data Sheet
Bidirectional, Synchronous PWM Controller
for Battery Test and Formation
ADP1974
FEATURES
GENERAL DESCRIPTION
Input voltage range: 6 V to 60 V
On-board 5 V linear regulator
Buck/charge or boost/discharge mode
High PWM linearity with internal 4 V p-p PWM ramp voltage
FAULT and COMP input compatible with AD8450/AD8451
Programmable dead time control
Adjustable frequency from 50 kHz to 300 kHz
Synchronization output or input with adjustable phase shift
Programmable maximum duty cycle
Programmable soft start
Peak hiccup current-limit protection
Pin-compatible with ADP1972 (asynchronous version)
TSD protection
16-lead TSSOP
APPLICATIONS
Single and multicell battery formation and testing
High efficiency battery test systems with recycle capability
Battery conditioning (charging and discharging) systems
Compatible with AD8450/AD8451 constant voltage (CV) and
constant current (CC) analog front end error amplifier
The ADP1974 is a constant frequency, voltage mode, synchronous,
pulse-width modulation (PWM) controller for bidirectional dc-to-
dc applications. The ADP1974 is designed for use in battery testing,
formation, and conditioning applications with an external, high
voltage field effect transistor (FET) half bridge driver, and an
external control device such as the AD8450/AD8451. The device
operates as a buck converter in battery charge mode and as a boost
converter in discharge mode to recycle energy to the input bus.
The ADP1974 high voltage VIN supply pin can withstand a
maximum operating voltage of 60 V and reduces the need for
additional system supply voltages. The ADP1974 has integrated
features such as precision enable, internal and external
synchronization control with programmable phase shift,
programmable maximum duty cycle, dead time control, and peak
hiccup current-limit protection. Additional protection features
include soft start to limit input inrush current during startup,
precision enable, and thermal shutdown (TSD). The ADP1974
also has a COMP pin to provide external control of the PWM
duty cycle and a FAULT pin that can disable the DH and DL
outputs. These functions are compatible with the AD8450/AD8451
analog front-end (AFE) error amplifiers.
The ADP1974 is available in a 16-lead TSSOP package and is
pin-compatible with the ADP1972.
TYPICAL APPLICATION CIRCUIT
BATTERY CHARGER SYSTEM CONTROL
+24V
VOLTAGE CURRENT
CHARGE/
SETPOINT SETPOINT DISCHARGE
ON/OFF
LOOP
COMPENSATION
ISET MODE
VCTRL
VSET
FAULT
AD8450
BVP0 BVN0 ISVN ISVP
+––+
VIN
VREG
SYNC
SCFG
EN ADP1974
MODE
DH
COMP
FAULT
FREQ
DMAX
GND
DL
CL
DT
SS
HV
MOSFET
DRIVER
ADuM7223
+24V RECYLCING DC BUS
NOTES
1. THE AD8450 AND ADuM7223 ARE SIMPLIFIED REPRESENTATIONS.
Figure 1.
Rev. 0
Document Feedback
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responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
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One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2015 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 Page


ADP1974
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Typical Application Circuit ............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 5
Thermal Operating Ranges ......................................................... 5
ESD Caution.................................................................................. 5
Pin Configuration and Function Descriptions............................. 6
Typical Performance Characteristics ............................................. 7
Theory of Operation ...................................................................... 10
Supply Pins .................................................................................. 10
EN/Shutdown.............................................................................. 11
Undervoltage Lockout (UVLO) ............................................... 11
Soft Start ...................................................................................... 11
Operating Modes........................................................................ 11
PWM Drive Signals.................................................................... 12
REVISION HISTORY
9/15—Revision 0: Initial Version
Data Sheet
External COMP Control ........................................................... 12
Peak Current-Limit Hiccup Implementation......................... 12
Negative Current-Limit Detection (Buck Mode) .................. 13
PWM Frequency Control.......................................................... 13
Maximum Duty Cycle ............................................................... 13
External Fault Signaling ............................................................ 13
Thermal Shutdown (TSD) ........................................................ 13
Applications Information .............................................................. 14
Buck or Boost Selection............................................................. 14
Selecting RS to Set the Current Limit....................................... 14
Adjusting the Operating Frequency ........................................ 14
Programming the Maximum Duty Cycle ............................... 16
Adjusting the Soft Start Period................................................. 16
PCB Layout Guidelines.................................................................. 18
Outline Dimensions ....................................................................... 19
Ordering Guide .......................................................................... 19
Rev. 0 | Page 2 of 19
3Pages


Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
VIN, EN, FAULT to GND
SYNC, COMP, MODE, VREG to GND
DH, DL, SS, DMAX, SCFG, CL, DT,
FREQ to GND
Operating Ambient Temperature Range
Junction Temperature
Storage Temperature Range
Rating
−0.3 V to +61 V
−0.3 V to +5.5 V
−0.3 V to VREG + 0.3 V
−40°C to +85°C
125°C
−65°C to +150°C
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
Absolute maximum ratings apply individually only, not in
combination.
THERMAL OPERATING RANGES
The ADP1974 can be damaged when the junction temperature
limits are exceeded. The maximum operating junction
temperature (TJ MAX) takes precedence over the maximum
operating ambient temperature (TA MAX). Monitoring ambient
temperature does not guarantee that the junction temperature
(TJ) is within the specified temperature limits.
ADP1974
In applications with high power dissipation and poor printed
circuit board (PCB) thermal resistance, the maximum ambient
temperature may need to be derated. In applications with
moderate power dissipation and low PCB thermal resistance,
the maximum ambient temperature can exceed the maximum
limit when the junction temperature is within specification
limits.
The junction temperature (TJ) of the device is dependent on the
ambient temperature (TA), the power dissipation of the device
(PD), and the junction to ambient thermal resistance of the
package (θJA). Use the following equation to calculate the
maximum junction temperature (TJ) from the ambient
temperature (TA) and power dissipation (PD):
TJ = TA + (PD × θJA)
(1)
For additional information on thermal resistance, refer to
Application Note AN-000, Thermal Characteristics of IC
Assembly.
ESD CAUTION
Rev. 0 | Page 5 of 19
6 Page
合計 : 20 ページ |
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