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ADP5043 の電気的特性と機能
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ADP5043のメーカーはAnalog Devicesです、この部品の機能は「Micro PMU」です。 |
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製品の詳細 ( Datasheet PDF )
| 部品番号 ADP5043 |
| 部品説明 Micro PMU |
| メーカ Analog Devices |
ロゴ |
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Data Sheet
Micro PMU with 800 mA Buck, 300 mA LDO,
Supervisory, Watchdog, and Manual Reset
ADP5043
FEATURES
GENERAL DESCRIPTION
Input voltage range: 2.3 V to 5.5 V
One 800 mA buck regulator
One 300 mA LDO
20-lead, 4 mm × 4 mm LFCSP package
Initial regulator accuracy: ±1%
Overcurrent and thermal protection
Soft start
Undervoltage lockout
Open-drain processor reset with threshold monitoring
±1.5% threshold accuracy over the full temperate range
Guaranteed reset output valid to VCC = 1 V
Dual watchdog for secure systems
Watchdog 1 controls reset
Watchdog 2 controls reset and regulators power cycle
Buck regulator key specifications
Current-mode topology for excellent transient response
3 MHz operating frequency
Uses tiny multilayer inductors and capacitors
Mode pin selects forced PWM or auto PFM/PSM modes
100% duty cycle low dropout mode
LDO key specifications
Low VIN from 1.7 V to 5.5 V
Stable with1 µF ceramic output capacitors
High PSRR, 60 dB up to 1 kHz/10 kHz
Low output noise
Low dropout voltage: 150 mV at 300 mA load
−40°C to +125°C junction temperature range
The ADP5043 combines one high performance buck regulator
and one low dropout regulator (LDO) in a small 20-lead LFCSP
to meet demanding performance and board space requirements.
The high switching frequency of the buck regulator enables use
of tiny multilayer external components and minimizes board space.
The MODE pin selects the buck’s mode of operation. When set
to logic high, the buck regulator operates in forced PWM mode.
When the MODE pin is set to logic low, the buck regulator
operates in PWM mode when the load is around the nominal
value. When the load current falls below a predefined threshold,
the regulator operates in power save mode (PSM) improving
the light-load efficiency.
The low quiescent current, low dropout voltage, and wide input
voltage range of the ADP5043 LDO extend the battery life of
portable devices. The LDO maintains a power supply rejection
of greater than 60 dB for frequencies as high as 10 kHz while
operating with a low headroom voltage.
Each regulator is activated by a high level on the respective
enable pin. The ADP5043 is available with factory programmable
default output voltages and can be set to a wide range of options.
The ADP5043 contains supervisory circuits that monitor
power supply voltage levels and code execution integrity in
microprocessor-based systems. The ADP5043 also provides
power-on reset signals. An on-chip dual watchdog timer can
reset the microprocessor or power cycle the system (Watchdog 2)
if it fails to strobe within a preset timeout period.
HIGH LEVEL BLOCK DIAGRAM
VIN1 = 2.3V
TO 5.5V
RFILT
30Ω
C5
4.7µF
ON
OFF
AVIN
VIN1
EN1
VIN2 = 1.7V
TO 5.5V
C1
1µF
VIN2
ON
OFF
EN2
AVIN
ADP5043
BUCK
EN_BK
LDO
EN_LDO
SW
VOUT1
PGND
L1
1µH
VOUT1 @
C6 800mA
10µF
MODE
VOUT2
FPWM
PSM/PWM
VOUT2 @
300mA
C2
1µF
AVIN
WSTAT
MR nRSTO
NC WDI1
WDI2
NC
WMOD
GND
AGND GND
VIN
WD1 MODE
SELECTION
Figure 1.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2011 Analog Devices, Inc. All rights reserved.
1 Page
ADP5043
TABLE OF CONTENTS
Features .............................................................................................. 1
General Description ......................................................................... 1
High Level Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
General Specifications ................................................................. 3
Supervisory Specifications .......................................................... 3
Buck Specifications....................................................................... 5
LDO Specifications ...................................................................... 5
Input and Output Capacitor, Recommended Specifications.. 6
Absolute Maximum Ratings............................................................ 7
Thermal Data ................................................................................ 7
Thermal Resistance ...................................................................... 7
ESD Caution.................................................................................. 7
Pin Configuration and Function Descriptions............................. 8
Typical Performance Characteristics ............................................. 9
Theory of Operation ...................................................................... 16
REVISION HISTORY
10/11—Rev. 0 to Rev. A
Updated Outline Dimensions ....................................................... 30
Changes to Ordering Guide .......................................................... 30
4/11—Revision 0: Initial Version
Data Sheet
Power Management Unit........................................................... 16
Buck Section................................................................................ 17
LDO Section ............................................................................... 18
Supervisory Section ................................................................... 18
Applications Information .............................................................. 21
Buck External Component Selection....................................... 21
LDO Capacitor Selection .......................................................... 22
Supervisory Section ................................................................... 23
PCB Layout Guidelines.............................................................. 24
Power Dissipation/Thermal Considerations ............................. 25
Evaluation Board Schematics and Artwork............................ 27
Suggested Layout ........................................................................ 27
Bill of Materials........................................................................... 28
Application Diagram ................................................................. 28
Factory Programmable Options ................................................... 29
Outline Dimensions ....................................................................... 30
Ordering Guide .......................................................................... 30
Rev. A | Page 2 of 32
3Pages
Data Sheet
ADP5043
BUCK SPECIFICATIONS
AVIN, VIN1 = 3.6 V, VOUT1 = 1.8 V, TJ = −40°C to +125°C for minimum/maximum specifications, L = 1 µH, COUT = 10 µF, and TA = 25°C
for typical specifications, unless otherwise noted.1
Table 3.
Parameter
INPUT CHARACTERISTICS
Input Voltage Range (VIN1)
OUTPUT CHARACTERISTICS
Output Voltage Accuracy
PWM TO POWER SAVE MODE CURRENT THRESHOLD
INPUT CURRENT CHARACTERISTICS
DC Operating Current
Shutdown Current
SW CHARACTERISTICS
SW On Resistance
Current Limit
ACTIVE PULL-DOWN
OSCILLATOR FREQUENCY
START-UP TIME
Test Conditions/Comments
PWM mode, ILOAD = 100 mA
PSM mode
VIN1 = 2.3 V to 5.5 V, PWM mode,
ILOAD = 1 mA to 800 mA
ILOAD = 0 mA, device not switching
ENx = 0 V, TA = TJ = −40°C to +125°C
PFET
PFET, AVIN = VIN1 = 5 V
NFET
NFET, AVIN = VIN1 = 5 V
PFET switch peak current limit
EN1 = 0 V
Min
2.3
−1
−2
−3
1100
2.5
Typ
100
21
0.2
180
140
170
150
1360
75
3.0
250
Max
5.5
+1
+2
+3
35
1.0
240
190
235
210
1600
3.5
Unit
V
%
%
%
mA
μA
μA
mΩ
mΩ
mΩ
mΩ
mA
Ω
MHz
μs
1 All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC).
LDO SPECIFICATIONS
AVIN = 3.6 V, VIN2 = (VOUT2 + 0.2 V) or 2.3 V, whichever is greater; AVIN, VIN1 ≥ VIN2; IOUT = 10 mA; CIN = COUT = 1 µF;
TA = 25°C, unless otherwise noted.
Table 4.
Parameter
INPUT VOLTAGE RANGE
OPERATING SUPPLY CURRENT (per LDO)
Symbol
VIN2
IGND
FIXED OUTPUT VOLTAGE ACCURACY
VOUT2
Test Conditions/Comments
TJ = −40°C to +125°C
IOUT = 0 µA, VOUT = 3.3 V
IOUT = 0 µA, VOUT = 3.3 V,
TJ = −40°C to +125°C
IOUT = 10 mA
IOUT = 10 mA, TJ = −40°C to +125°C
IOUT = 200 mA
IOUT = 200 mA, TJ = −40°C to +125°C
IOUT = 10 mA
100 µA < IOUT < 300 mA
VIN2 = (VOUT2 + 0.5 V) to 5.5 V
100 µA < IOUT < 300 mA
VIN2 = (VOUT2 + 0.5 V) to 5.5 V
TJ = −40°C to +125°C
Min
1.7
−1
−2
−3
Typ
15
67
100
Max
5.5
50
105
245
+1
+2
+3
Unit
V
µA
µA
µA
µA
µA
µA
%
%
%
Rev. A | Page 5 of 32
6 Page
合計 : 30 ページ |
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| 部品番号 | 部品説明 | メーカ |
| ADP5040 | Micro PMU | Analog Devices |
| ADP5041 | Micro PMU | Analog Devices |
| ADP5042 | Micro PMU | Analog Devices |
| ADP5043 | Micro PMU | Analog Devices |