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データシート VSKL41-08P PDF ダウンロード ( 特性, スペック, ピン接続図 )

部品番号 VSKL41-08P
部品説明 ADD-A-PAK Generation VII Power Modules
メーカ Vishay
ロゴ Vishay ロゴ 
プレビュー
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VSKL41-08P Datasheet, VSKL41-08P PDF,ピン配置, 機能
www.vishay.com
VSK.41.., VSK.56.. Series
Vishay Semiconductors
ADD-A-PAK Generation VII Power Modules
Thyristor/Diode and Thyristor/Thyristor, 45 A/60 A
ADD-A-PAK
PRODUCT SUMMARY
IT(AV) or IF(AV)
Type
45 A/60 A
Modules - Thyristor, Standard
MECHANICAL DESCRIPTION
The ADD-A-PAK generation VII, new generation of
ADD-A-PAK module, combines the excellent thermal
performances obtained by the usage of exposed direct
bonded copper substrate, with advanced compact simple
package solution and simplified internal structure with
minimized number of interfaces.
FEATURES
• High voltage
• Industrial standard package
• Low thermal resistance
• UL approved file E78996
• Designed and qualified for industrial level
• Material categorization: For definitions of compliance
please see www.vishay.com/doc?99912
BENEFITS
• Excellent thermal performances obtained by the usage of
exposed direct bonded copper substrate
• Up to 1600 V
• High surge capability
• Easy mounting on heatsink
ELECTRICAL DESCRIPTION
These modules are intended for general purpose high
voltage applications such as high voltage regulated power
supplies, lighting circuits, temperature and motor speed
control circuits, UPS, and battery charger.
MAJOR RATINGS AND CHARACTERISTICS
SYMBOL
CHARACTERISTICS
IT(AV) or IF(AV)
IO(RMS)
ITSM,
IFSM
I2t
I2t
VRRM
TStg
TJ
85 °C
As AC switch
50 Hz
60 Hz
50 Hz
60 Hz
Range
VSK.41
45
100
850
890
3.61
3.30
36.1
400 to 1600
-40 to 125
-40 to 125
VSK.56
60
135
1200
1256
7.20
6.57
72
UNITS
A
kA2s
kA2s
V
°C
Revision: 14-Jan-14
1 Document Number: 94630
For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

1 Page



VSKL41-08P pdf, ピン配列
www.vishay.com
VSK.41.., VSK.56.. Series
Vishay Semiconductors
TRIGGERING
PARAMETER
Maximum peak gate power
Maximum average gate power
Maximum peak gate current
Maximum peak negative gate voltage
Maximum gate voltage required to trigger
Maximum gate current required to trigger
Maximum gate voltage that will not trigger
Maximum gate current that will not trigger
SYMBOL
PGM
PG(AV)
IGM
- VGM
VGT
IGT
VGD
IGD
TEST CONDITIONS
TJ = -40 °C
TJ = 25 °C
TJ = 125 °C
Anode supply = 6 V
resistive load
TJ = -40 °C
TJ = 25 °C
TJ = 125 °C
Anode supply = 6 V
resistive load
TJ = 125 °C, rated VDRM applied
TJ = 125 °C, rated VDRM applied
VSK.41 VSK.56
10
2.5
2.5
10
4.0
2.5
1.7
270
150
80
0.25
6
UNITS
W
A
V
mA
V
mA
BLOCKING
PARAMETER
Maximum peak reverse and off-state
leakage current at VRRM, VDRM
SYMBOL
IRRM,
IDRM
TEST CONDITIONS
TJ = 125 °C, gate open circuit
Maximum RMS insulation voltage
VINS
50 Hz
Maximum critical rate of rise of off-state voltage dV/dt TJ = 125 °C, linear to 0.67 VDRM
VSK.41 VSK.56 UNITS
15 mA
3000 (1 min)
3600 (1 s)
1000
V
V/μs
THERMAL AND MECHANICAL SPECIFICATIONS
PARAMETER
SYMBOL
TEST CONDITIONS
Junction operating and storage
temperature range
TJ, TStg
Maximum internal thermal resistance,
junction to case per leg
RthJC
DC operation
Typical thermal resistance,
case to heatsink per module
RthCS Mounting surface flat, smooth and greased
VSK.41 VSK.56 UNITS
-40 to 125
°C
0.44 0.35
0.1
°C/W
Mounting torque ± 10 %
to heatsink
busbar
A mounting compound is recommended and the
torque should be rechecked after a period of
3 hours to allow for the spread of the compound.
4
3
Nm
Approximate weight
Case style
JEDEC®
75 g
2.7 oz.
AAP GEN VII (TO-240AA)
R CONDUCTION PER JUNCTION
DEVICES
SINE HALF WAVE CONDUCTION
180°
120°
90°
60°
30°
RECTANGULAR WAVE CONDUCTION
180°
120°
90°
60°
30°
VSK.41..
0.110 0.131
0.17
0.23 0.342 0.085 0.138 0.177 0.235 0.345
VSK.56..
0.088 0.104 0.134 0.184 0.273
0.07
0.111
0.143
0.189
0.275
Note
• Table shows the increment of thermal resistance RthJC when devices operate at different conduction angles than DC
UNITS
°C/W
Revision: 14-Jan-14
3 Document Number: 94630
For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000


3Pages


VSKL41-08P 電子部品, 半導体
www.vishay.com
130
120
VSK.56 Series
RthJC (DC) = 0.35°C/W
110
100
180°
120°
90 90°
60°
30°
80
0 10 20 30 40 50 60 70
Average on-state current (A)
Fig. 10 - Current Ratings Characteristics
130
120
VSK.56 Series
RthJC (DC) = 0.35 °C/W
110
100
DC
90 180°
120°
80
90°
60°
30°
70
0 20 40 60 80 100
Average on-state current (A)
Fig. 11 - Current Ratings Characteristics
100
180°
120°
80 90°
60°
30°
60
RMS limit
40
20
0
0
VSK.56 Series
Per leg, Tj = 125°C
10 20 30 40 50 60 70
Average on-state current (A)
Fig. 12 - On-State Power Loss Characteristics
VSK.41.., VSK.56.. Series
Vishay Semiconductors
140
180°
120 120°
90°
100
60°
30°
80
RMS limit
60
DC
40
20
0
0
VSK.56 Series
Per leg, Tj = 125°C
20 40 60 80 100
Average on-state current (A)
Fig. 13 - On-State Power Loss Characteristics
1100
1000
900
800
At any rated load condition and with
rated Vrrm applied following surge
Initial Tj = Tj max
@ 60 Hz 0.0083 s
@ 50 Hz 0.0100s
700
600
500
Per leg
400
1
10 100
Number of equal amplitude half cycle current pulses (N)
Fig. 14 - Maximum Non-Repetitive Surge Current
1300
1200
1100
1000
900
Maximum Non-repetitive Surge Current
Versus Pulse Train Duration. Control
of conduction may not be maintained.
Initial Tj = 125°C
No Voltage Reapplied
Rated Vrrm reapplied
800
700
600
500 Per leg
400
0.01
0.1
Pulse train duration (s)
1
Fig. 15 - Maximum Non-Repetitive Surge Current
Revision: 14-Jan-14
6 Document Number: 94630
For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

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