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部品番号 ASM3P2760A
部品説明 Low Power Peak EMI Reducing Solution
メーカ Alliance Semiconductor Corporation
ロゴ Alliance Semiconductor Corporation ロゴ 
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ASM3P2760A Datasheet, ASM3P2760A PDF,ピン配置, 機能
September 2005
ASM3P2760A
wrewvw.D1a.8taSheet4U.com
Low Power Peak EMI Reducing Solution
Features
ƒ Generates an EMI optimized clock signal at the
output.
ƒ Integrated loop filter components.
ƒ Operates with a 3.3V / 2.5V Supply.
ƒ Operating current less than 4mA.
ƒ Low power CMOS design.
ƒ Input frequency range: 6MHz to 12MHz for 2.5V.
: 6MHz to 13MHz for 3.3V.
ƒ Generates a 1X low EMI spread spectrum clock of
the input frequency.
ƒ Frequency deviation: ±0.65% @ 8MHz
ƒ Available in 6 pin TSOT-23, 8 pin SOIC and
8 pin TSSOP Packages.
Product Description
The ASM3P2760A is a versatile spread spectrum
frequency modulator designed specifically for a wide
range of clock frequencies. The ASM3P2760A reduces
electromagnetic interference (EMI) at the clock source,
allowing system wide reduction of EMI of all clock
dependent signals. The ASM3P2760A allows significant
system cost savings by reducing the number of circuit
board layers ferrite beads, shielding that are traditionally
required to pass EMI regulations.
The ASM3P2760A uses the most efficient and optimized
modulation profile approved by the FCC and is
implemented by using a proprietary all digital method.
The ASM3P2760A modulates the output of a single PLL
in order to “spread” the bandwidth of a synthesized clock,
and more importantly, decreases the peak amplitudes of
its harmonics. This results in significantly lower system
EMI compared to the typical narrow band signal produced
by oscillators and most frequency generators. Lowering
EMI by increasing a signal’s bandwidth is called ‘spread
spectrum clock generation’.
Applications
The ASM3P2760A is targeted towards all portable
devices with very low power requirements like MP3
players and digital still cameras.
Key Specifications
Description
Supply voltages
Cycle-to-Cycle Jitter
Output Duty Cycle
Modulation Rate Equation
Frequency Deviation
Specification
VDD = 3.3V / 2.5V
200pS (Max)
45/55%
FIN/256
±0.65% @ 8MHz
Block Diagram
VDD
PD
XIN
XOUT
Crystal
Oscillator
Frequency
Divider
Feedback
Divider
Modulation
Phase
Detector
Loop
Filter
PLL
VCO
Output
Divider
ModOUT
VSS
Alliance Semiconductor
2575 Augustine Drive Santa Clara, CA Tel: 408.855.4900 Fax: 408.855.4999 www.alsc.com
Notice: The information in this document is subject to change without notice.

--------------------------------------------
ASM3P2760A pdf, 電子部品, 半導体, ピン配列
September 2005
rwewvw1.D.a8taSheet4U.com
Pin Configuration ( 8-pin SOIC and TSSOP Packages )
ASM3P2760A
XIN/CLKIN 1
8 VDD
XOUT 2 ASM3P2760A 7 NC
PD 3
6 ModOUT
NC 4
5 VSS
Pin Description
Pin#
1
2
3
4
5
6
7
8
Pin Name
XIN/CLKIN
XOUT
PD
NC
VSS
ModOUT
NC
VDD
Type
I
O
I
-
P
O
-
P
Description
Crystal connection or external reference frequency input. This pin has dual functions. It
can be connected either to an external crystal or an external reference clock.
Crystal connection. If using an external reference, this pin must be left unconnected.
Power-down control pin. Pull low to enable power-down mode. Connect to VDD if not
used.
No connect.
Ground connection.
Spread spectrum clock output.
No connect.
Power supply for the entire chip
Modulation Profile
Specification
Frequency Range
Description
For 2.5V Supply
For 3.3V Supply
Modulation Equation
Frequency Deviation
Specification
6MHz < CLKIN < 12MHz
6MHz < CLKIN < 13MHz
FIN/256
±0.65% @ 8MHz
Low Power Peak EMI Reducing Solution
Notice: The information in this document is subject to change without notice.
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