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データシート TS27M2ACN PDF ( 特性, スペック, ピン接続図 )

部品番号 TS27M2ACN
部品説明 PRECISION LOW POWER CMOS DUAL OPERATIONAL AMPLIFIERS
メーカ STMicroelectronics
ロゴ STMicroelectronics ロゴ 
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TS27M2ACN Datasheet, TS27M2ACN PDF,ピン配置, 機能
TS27M2C,I,M
PRECISION LOW POWER
CMOS DUAL OPERATIONAL AMPLIFIERS
s LOW POWER CONSUMPTION : 150µA/op
s OUTPUT VOLTAGE CAN SWING TO
GROUND
s EXCELLENT PHASE MARGIN ON
CAPACITIVE LOADS
s STABLE AND LOW OFFSET VOLTAGE
s THREE INPUT OFFSET VOLTAGE
SELECTIONS
DESCRIPTION
These devices are low cost, low power dual oper-
ational amplifiers designed to operate with single
or dual supplies. These operational amplifiers use
the ST silicon gate CMOS process allowing an ex-
cellent consumption-speed ratio. These series are
ideally suited for low consumption applications.
Three power consumptions are available allowing
to have always the best consumption-speed ratio:
u ICC = 10µA/amp.: TS27L2 (very low power)
u ICC = 150µA/amp.: TS27M2 (low power)
u ICC = 1mA/amp.: TS272 (standard)
These CMOS amplifiers offer very high input im-
pedance and extremely low input currents. The
major advantage versus JFET devices is the very
low input currents drift with temperature (see fig-
ure 2).
ORDER CODE
Part Number Temperature Range
TS27M2C/AC/BC
0°C, +70°C
TS27M2I/AI/BI
-40°C, +125°C
TS27M2M/AM/BM -55°C, +125°C
Example : TS27M2ACN
Package
NDP
•••
•••
•••
N = Dual in Line Package (DIP)
D = Small Outline Package (SO) - also available in Tape & Reel (DT)
P = Thin Shrink Small Outline Package (TSSOP) - only available
in Tape & Reel (PT)
N
DIP8
(Plastic Package)
D
SO8
(Plastic Micropackage)
P
TSSOP8
(Thin Shrink Small Outline Package)
PIN CONNECTIONS (top view)
1
2-
3+
4
8
7
-6
+5
1 - Output 1
2 - Inverting Input 1
3 - Non-inverting Input 1
4 - V CC -
5 - Non-inverting Input 2
6 - Inverting Input 2
7 - Output 2
8 - V CC +
November 2001
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TS27M2ACN pdf, ピン配列
SCHEMATIC DIAGRAM (for 1/2 TS27M2)
TS27M2C,I,M
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TS27M2ACN 電子部品, 半導体
TS27M2C,I,M
Figure 5 : Open Loop Frequency Response and
Phase Shift
Figure 8 : Phase Margin versus Capacitive Load
50
40
GAIN
30 PHASE
20 Tamb = 25˚C
10
VCC+ = 10V
RL = 100k
0 C L = 100pF
AVCL = 100
-10
102 103 104
Phase
Margin
Gain
Bandwidth
Product
105 106
FREQUENCY, f (Hz)
0
45
90
135
180
10 7
Figure 6 : Gain Bandwidth Product versus Supply
Voltage
80
T amb= 25˚C
R L = 100k
70 A V = 1
VCC = 10V
60
50
40
0
20 40 60 80
CAPACITANCE, C L (pF)
100
Figure 9 : Slew Rate versus Supply Voltage
1800
1400
1000
Tamb = 25˚C
R L = 100k
CL = 100pF
AV = 1
600
200
0
4 8 12
SUPPLY VOLTAGE, VCC (V)
16
0.9
Tamb = 25˚C
0.8 RL = 100k
C L = 100pF
0.7
SR
0.6 SR
0.5
0.4 4
6 8 10 12 14 16
SUPPLY VOLTAGE, VCC (V)
Figure 7 : Phase Margin versus Supply Voltage
Figure 10 : Input Voltage Noise versus
Frequency
50 300
VCC = 10V
Tamb = 25˚C
40 200 R S = 100
Tamb = 25˚C
30 RL = 100k
CL = 100pF
AV = 1
20
0
4
8 12
SUPPLY VOLTAGE, VCC (V)
16
100
0
1 10 100 1000
FREQUENCY (Hz)
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