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データシート TS27L4C PDF ( 特性, スペック, ピン接続図 )

部品番号 TS27L4C
部品説明 PRECISION VERY LOW POWER CMOS QUAD OPERATIONAL AMPLIFIER
メーカ STMicroelectronics
ロゴ STMicroelectronics ロゴ 
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TS27L4C Datasheet, TS27L4C PDF,ピン配置, 機能
TS27L4C,I,M
PRECISION VERY LOW POWER CMOS
QUAD OPERATIONAL AMPLIFIER
s VERY LOW POWER CONSUMPTION :
10µA/op
s OUTPUT VOLTAGE CAN SWING TO
GROUND
s EXCELLENT PHASE MARGIN ON
CAPACITIVE LOADS
s STABLE AND LOW OFFSET VOLTAGE
s THREE INPUT OFFSET VOLTAGE
SELECTIONS
DESCRIPTION
These devices are low cost, low power quad oper-
ational amplifiers designed to operate with single
or dual supplies. These operational amplifiers use
the ST silicon gate CMOS process allowing an ex-
cellent consumption-speed ratio. These series are
ideally suited for low consumption applications.
Three power consumptions are available allowing
to have always the best consumption-speed ratio:
u ICC = 10µA/amp.: TS27L4 (very low power)
u ICC = 150µA/amp.: TS27M4 (low power)
u ICC = 1mA/amp.: TS274 (standard)
These CMOS amplifiers offer very high input im-
pedance and extremely low input currents. The
major advantage versus JFET devices is the very
low input currents drift with temperature (see fig-
ure 2).
ORDER CODE
Part Number Temperature Range
TS27L4C/AC/BC
0°C, +70°C
TS27L4I/AI/BI*
-40°C, +125°C
TS27L4M/AM/BM
-55°C, +125°C
Example : TS27L4ACN
Package
NDP
•••
•••
•••
N = Dual in Line Package (DIP)
D = Small Outline Package (SO) - also available in Tape & Reel (DT)
P = Thin Shrink Small Outline Package (TSSOP) - only available
in Tape & Reel (PT)
* TS27L4BID : For delivery information, please contact your ST sales
representative or distributor.
June 2003
N
DIP14
(Plastic Package)
D
SO14
(Plastic Micropackage)
P
TSSOP14
(Thin Shrink Small Outline Package)
PIN CONNECTIONS (top view)
Output 1 1
Inverting Input 1 2
Non-inverting Input 1 3
VCC + 4
Non-inverting Input 2 5
Inverting Input 2 6
Output 2 7
-
+
+
-
14 Output 4
- 13 Inverting Input 4
+ 12 Non-inverting Input 4
11 VCC -
+ 10 Non-inverting Input 3
- 9 Inverting Input 3
8 Output 3
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TS27L4C pdf, ピン配列
SCHEMATIC DIAGRAM (for 1/4 TS27L4)
TS27L4C,I,M
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TS27L4C 電子部品, 半導体
TS27L4C,I,M
Figure 5 : Open Loop Frequency Response and
Phase Shift
Figure 8 : Phase Margin versus Capacitive Load
50
40
30
PHASE
20
10
TVaCmCb+
=
=
25°C
10V
R L = 1M
0
C L = 100pF
A VCL = 1 0 0
-10
G AIN
Phase
Margin
Gain
Bandwidth
Product
0
45
90
135
180
2
10
3
10
4
10
5 67
10 10 10
FREQ UENCY, f (Hz)
Figure 6 : Gain Bandwidth Product versus Supply
Voltage
120
T amb = 2 5 °C
100 R L = 1M
C L = 100pF
80 A V = 1
60
40
0 4 8 12 16
S U P P L Y V O L T A G E , VCC (V )
Figure 7 : Phase Margin versus Supply Voltage
80
T amb = 2 5 °C
RL = 1M
70 A V = 1
V CC= 1 0 V
60
50
40
0
20 40 60 80
C APAC ITAN C E, C L (pF)
100
Figure 9 : Slew Rate versus Supply Voltage
0.05
0.04
T amb = 2 5 °C
RL = 1M
C = 100pF
L
SR
0.03
SR
0.02
4
6 8 10 12 14
S U P P L Y V O L T A G E , VCC (V )
16
Figure 10 : Input Voltage Noise versus
Frequency
60
T amb = 2 5 °C
R L = 1M
50
C = 100pF
A
L
V
=
1
40
300
VCC = 10V
Tamb = 25˚C
200 R S = 100
100
30
04
8 12
S U P P L Y V O L T A G E , V CC (V )
16
0
1 10 100 1000
FREQUENCY (Hz)
6/9

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