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部品番号 M5M29FB800VP-12
部品説明 8M-Bit BLOCK ERASE FLASH MEMORY
メーカ Mitsubishi
ロゴ Mitsubishi ロゴ 
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M5M29FB800VP-12 Datasheet, M5M29FB800VP-12 PDF,ピン配置, 機能
MITMSIUTSBUISBHISI HLISILsSIs
M5M29FBM/T58M0290FFBP/T,8V00PF,PR,VVP-,8R0V-,8-01,0-1,0-,1-122
8,388,388,680,680-B8-IBT I(T10(14084,587,567-W6-OWRODRDBYB8Y-B8-IBT I/T5/2542,248,288-W8-OWRODRDBYB1Y61-B6-IBT)IT)
CMCOMSO3S.33V.3-OVN-OLNYL, YB, LBOLCOKCEKREARSAESFELFALSAHSMHEMMEOMROYRY
DESCRIPTION
The MITSUBISHI M5M29FB/T800FP, VP, RV are 3.3V-only high speed 8,388,608-bit CMOS boot block Flash Memories suitable for
mobile and personal computing, and communication products. The M5M29FB/T800FP, VP, RV are fabricated by CMOS technology for
the peripheral circuits and DINOR(Divided bit line NOR) architecture for the memory cells, and are available in 44pin SOP or 48pin
TSOP(I).
FEATURES
Organization
................................. 524,288 word x 16bit
................................. 1,048,576 word x 8 bit
Supply voltage ............................................................. VCC = 3.3V±0.3V
Access time
.............................. 80/100/120ns (Max)
PIN CONFIGURATION (TOP VIEW)
Power Dissipation
Read
....................... 108 mW (Max.)
Program/Erase
....................... 144 mW (Max.)
Standby
....................... 0.72 mW (Max.)
Deep power down mode ....................... 3.3µW (typ.)
Auto program
Program Time
....................... 7.5ms (typ.)
Program Unit ................................. 128word
Auto Erase
Erase time
................................. 50 ms (typ.)
Erase Unit
Boot Block ................................. 8Kword / 16Kbyte x 1
Parameter Block ........................ 4Kword / 8Kbyte x 2
Main Block
.......................16Kword / 32Kbyte x 1
........................... 32Kword / 64Kbyte x 15
Program/Erase cycles ....................................... 100Kcycles
NC
A18
A17
A7
A6
ADDRESS
INPUTS
A5
A4
A3
A2
A1
CHIP ENABLE
INPUT
A0
/CE
GND
OUTPUT ENABLE
INPUT
/OE
DQ0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
RESET/
44
/RP
POWER DOWN
INPUT
43 /WE WRITE ENABLE
INPUT
42 A8
41 A9
40 A10
39 A11
ADDRESS
38 A12 INPUTS
37 A13
36 A14
35 A15
34 A16
33
/BYTE
BYTE ENABLE
INPUT
32 GND
31 DQ15/A-1
30 DQ7
Boot Block
M5M29FB800
M5M29FT800
Other Functions
........................... Bottom Boot
........................... Top Boot
DATA
INPUTS/
OUTPUTS
DQ8
DQ1
DQ9
DQ2
16
17
18
19
29 DQ14
28 DQ6
27 DQ13
26 DQ5
DATA
INPUTS/
OUTPUTS
Software Command Control
DQ10 20
25 DQ12
Selective Block Lock
Erase Suspend/Resume
Program Suspend/Resume
DQ3
DQ11
21
22
24 DQ4
23 VCC
Status Register Read
Sleep
Package
Outline 600mil 44-pin SOP
(FP: 44P2A-A)
48-Lead, 12mmx 20mm TSOP (type-I)
44-Lead SOP
APPLICATION
Code Storage PC BIOS
Digital Cellular Phone/Telecommunication
A15
A14
A13
A12
A11
A10
A9
A8
NC
NC
/WE
/RP
NC
/WP
RY/BY
A18
A17
A7
A6
A5
A4
A3
A2
A1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
M5M29FB/T800VP
48 A16
47 /BYTE
A16
/BYTE
1
2
46 GND
GND
3
45 DQ15/A-1 DQ15/A-1
4
44 DQ7
43 DQ14
DQ7
DQ14
5
6
42 DQ6
DQ6
7
41 DQ13
40 DQ5
DQ13
DQ5
8
9
39 DQ12
DQ12
10
38 DQ4
37 VCC
36 DQ11
35 DQ3
DQ4
VCC
DQ11
DQ3
11
12
13
14
34 DQ10
33 DQ2
DQ10
DQ2
15
16
32 DQ9
31 DQ1
30 DQ8
DQ9
DQ1
DQ8
17
18
19
29 DQ0
28 /OE
DQ0
/OE
20
21
27 GND
26 /CE
GND
/CE
22
23
25 A0
A0 24
M5M29FB/T800RV
48 A15
47 A14
46 A13
45 A12
44 A11
43 A10
42 A9
41 A8
40 NC
39 NC
38 /WE
37 /RP
36 NC
35 /WP
34 RY/BY
33 A18
32 A17
31 A7
30 A6
29 A5
28 A4
27 A3
26 A2
25 A1
Outline 48pin TSOP type-I (12 X 20mm)
VP(Normal bend): 48P3R-B
RV(Reverse bend): 48P3R-C
NC : NO CONNECTION
This product is compatible with HN29WB/T800 by Hitachi Ltd.
1 May 1997 , Rev.6.1

--------------------------------------------
M5M29FB800VP-12 pdf, 電子部品, 半導体, ピン配列
MITSUBISHI LSIs
M5M29FB/T800FP,VP,RV-80,-10,-12
8,388,608-BIT (1048,576-WORD BY 8-BIT / 524,288-WORD BY16-BIT)
CMOS 3.3V-ONLY, BLOCK ERASE FLASH MEMORY
SOFTWARE COMMAND DEFINITIONS
The device operations are selected by writing specific software
command into the Command User Interface.
Read Array Command (FFH)
The device is in Read Array mode on initial device powerup and
after exit from deep powerdown, or by writing FFH to the
Command User Interface. The device remains in Read Array
mode until the other commands are written.
Read Device Identifier Command (90H)
Though PROM programmers can normally read device identifier
codes by raising A9 to VID, multiplexing high voltage onto address
lines is not desired for micro-processor system. It is an other
means to read device identifier codes that Read Device Identifier
Code Command(90H) is written to the command latch. Following
the command write, the manufacturer code and the device code
can be read from address 0000H and 0001H, respectively.
Read Status Register Command (70H)
The Status Register is read after writing the Read Status Register
command of 70H to the Command User Interface.
The contents of Status Register are latched on the later falling
edge of /OE or /CE. So /CE or /OE must be toggled every status
read.
DATA PROTECTION
The M5M29FB/T800 provides selectable block locking of memory
blocks. Each block has an associated nonvolatile lock-bit which
determines the lock status of the block. In addition, the
M5M29FB/T800 has a master Write Protect pin (WP) which
prevents any modifications to memory blocks whose lock-bits are
set to "0", when /WP is low. When /WP is high or /RP is VHH, all
blocks can be programmed or erased regardless of the state of
the lock-bits, and the lock-bits are cleared to "1" by erase.
Power Supply Voltage
When the power supply voltage (Vcc) is less than 2.2V, the device
is set to the Read-only mode.
A delay time of 2 us is required before any device operation is
initiated. The delay time is measured from the time Vcc reaches
Vccmin (3.0V).
During power up, /RP=GND is recommended. Falling in Busy
status is not recommended for possibility of damaging the device.
Clear Status Register Command (50H)
The Erase Status and Program Status bits are set to "1"s by the
Write State Machine and can only be reset by the Clear Status
Register command of 50H. These bits indicates various failure
conditions.
Block Erase / Confirm Command (20H/D0H)
Automated block erase is initiated by writing the Block Erase
command of 20H followed by the Confirm command of D0H. An
address within the block to be erased is required. The WSM
executes iterative erase pulse application and erase verify
operation.
Page Program Commands(41H)
Page Program allows fast programming of 128words of data.
Writing of 41H initiates the page program operation. From 2nd
cycle to 129th cycle write data must be serially inputted. Address
A6-0 have to be incremented from 00H to 7FH. After completion
of data loading, the WSM controls the program pulse application
and verify operation.
Basically re-program must not be done on a page which has
already programmed.
Suspend/Resume Command (B0H/D0H)
Writing the Suspend command of B0H during block erase
operation interrupts the block erase operation and allows read out
from another block of memory. Writing the Suspend command of
B0H during program operation interrupts the program operation
and allows read out from another block of memory. The device
continues to output Status Register data when read, after the
Suspend command is written to it. Polling the WSM Status and
Suspend Status bits will determine when the erase operation or
program operation has been suspended. At this point, writing of
the Read Array command to the CUI enables reading data from
blocks other than that which is suspended. When the Resume
command of D0H is written to the CUI, the WSM will continue with
the erase or program processes.
3
May 1997 , Rev.6.1





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