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部品番号 ASM3P2180A
部品説明 Peak Reducing EMI Solution
メーカ ON Semiconductor
ロゴ ON Semiconductor ロゴ 
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ASM3P2180A Datasheet, ASM3P2180A PDF,ピン配置, 機能
ASM3P2180A
Peak Reducing
EMI Solution
Product Description
The ASM3P2180A is a versatile spread spectrum frequency
modulator designed specifically for a wide range of clock frequencies.
ASM3P2180A reduces electromagnetic interference (EMI) at the
clock source, allowing system wide reduction of EMI of down stream
clock and data dependent signals. ASM3P2180A allows significant
system cost savings by reducing the number of circuit board layers,
and shielding that are traditionally required to pass EMI regulations.
ASM3P2180A modulates the output of a single PLL in order to
“spread” the bandwidth of a synthesized clock, thereby decreasing the
peak amplitudes of its harmonics. This results in significantly lower
system EMI compared to the typical narrow band signal produced by
oscillators and most clock generators. Lowering EMI by increasing
a signal’s bandwidth is called spread spectrum clock generation.
ASM3P2180A uses the most efficient and optimized modulation
profile approved by the FCC and is implemented by using
a proprietary all-digital method.
Features
Generates a 1x EMI Optimized Clock Output
Input Frequency:
6 MHz − 10 MHz
18 MHz − 30 MHz
Output Frequency:
6 MHz − 10 MHz
18 MHz − 30 MHz
Two Selectable Down Spread Options
Selectable Frequency Range
Integrated Loop Filter Components
Operates with a 3.3 V Supply
CMOS Design
8-Pin SOIC Packages
This Device is Pb-Free, Halogen Free and is RoHS Compliant
Applications
The ASM3P2180A is targeted towards notebook LCD displays,
other displays using an LVDS interface, PC peripheral devices and
embedded systems.
www.onsemi.com
8
1
SOIC−8 NB
CASE 751
PIN CONNECTION
CLKIN/XIN 1
8 NC
XOUT 2
GND 3
ASM3P2180A
7 FS
6 VDD
SS% 4
5 CLKOUT
MARKING DIAGRAM
8
ACT
ALYWX
G
1
ACT
A
L
Y
W
G
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb-Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information on page 4 of
this data sheet.
© Semiconductor Components Industries, LLC, 2016
July, 2016 − Rev. 4
1
Publication Order Number:
ASM3P2180/D

--------------------------------------------
ASM3P2180A pdf, 電子部品, 半導体, ピン配列
ASM3P2180A
Table 3. SPREAD SELECTION
Frequency (MHz)
SS%
FS = 0
FS = 1
0 6 18
8 24
10 30
1 6 18
8 24
10 30
Deviation (%) (Typ)
−2
−1.5
−1
−4
−3
−2
Table 4. ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Rating
Unit
VDD, VIN
Voltage on any Pin with Respect to Ground
−0.5 to +4.6
V
TSTG
Storage Temperature
−60 to +125
°C
TS Maximum Soldering Temperature (10 s)
260 °C
TJ Junction Temperature
150 °C
TDV Static Discharge Voltage (as per JEDEC STD22−A114−B)
2
kV
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
Table 5. RECOMMENDED OPERATING CONDITIONS
Parameter
Description
Min Max Unit
VDD
Supply Voltage
2.8 3.7
V
TA Operating Temperature (Ambient Temperature)
−40 +85
°C
CL Load Capacitance
− 15 pF
CIN Input Capacitance
− 4 pF
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
Table 6. DC ELECTRICAL CHARACTERISTICS
Symbol
Parameter
VIL
VIH
IIL
IIH
IXOL
IXOH
VOL
VOH
ICC
Input Low Voltage
Input High Voltage
Input Low Current (Pull-Up Resistors on Inputs SS%, FS)
Input High Current
XOUT Output Low Current (@ 0.4 V, VDD = 3.3 V)
XOUT Output High Current (@ 2.5 V, VDD = 3.3 V)
Output Low Voltage (VDD = 3.3 V, IOL = 4 mA)
Output High Voltage (VDD = 3.3 V, IOH = 4 mA)
Dynamic Supply Current Normal Mode
(3.3 V and 10 pF Loading)
IDD* Static Supply Current Standby Mode
VDD Operating Voltage
tON Power-Up Time (First Locked Clock Cycle after Power-Up)
ZOUT
Clock Output Impedance
* CLKIN pin pulled to GND.
Min
GND − 0.3
2.0
2.5
10
2.8
Typ
3
4
15
3.3
0.18
50
Max
0.8
VDD + 0.3
−27
18
0.4
25
7
3.7
Unit
V
V
mA
mA
mA
mA
V
V
mA
mA
V
ms
W
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